PAPI  5.7.0.0
papi_events_table.h
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1 static char *papi_events_table =
2 "#\n"
3 "# Every CPU automatically has PAPI_TOT_CYC and PAPI_TOT_INS added\n"
4 "#\n"
5 "# Processor identifier and additional flags.\n"
6 "# The processor identifier *can not* contain any comma characters as these\n"
7 "# characters serve to delimit fields.\n"
8 "#\n"
9 "CPU,AMD64 (K7)\n"
10 "CPU,amd64_k7\n"
11 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
12 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
13 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
14 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
15 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
16 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
17 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
18 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES\n"
19 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
20 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
21 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
22 "#\n"
23 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1_DTLB_AND_L2_DTLB_MISS\n"
24 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
25 "PRESET,PAPI_TLB_TL,DERIVED_ADD,L1_DTLB_AND_L2_DTLB_MISS,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
26 "#\n"
27 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
28 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
29 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
30 "#\n"
31 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
32 "#\n"
33 "CPU,AMD64\n"
34 "CPU,AMD64 (unknown model)\n"
35 "CPU,AMD64 (K8 RevB)\n"
36 "CPU,AMD64 (K8 RevC)\n"
37 "CPU,AMD64 (K8 RevD)\n"
38 "CPU,AMD64 (K8 RevE)\n"
39 "CPU,AMD64 (K8 RevF)\n"
40 "CPU,AMD64 (K8 RevG)\n"
41 "CPU,amd64_k8_revb\n"
42 "CPU,amd64_k8_revc\n"
43 "CPU,amd64_k8_revd\n"
44 "CPU,amd64_k8_reve\n"
45 "CPU,amd64_k8_revf\n"
46 "CPU,amd64_k8_revg\n"
47 "#\n"
48 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
49 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
50 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
51 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
52 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
53 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
54 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
55 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
56 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES\n"
57 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
58 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
59 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
60 "#\n"
61 "PRESET,PAPI_L2_ICA,NOT_DERIVED,REQUESTS_TO_L2:INSTRUCTIONS\n"
62 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS\n"
63 "PRESET,PAPI_L2_ICH,NOT_DERIVED,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
64 "PRESET,PAPI_L2_DCA,NOT_DERIVED,REQUESTS_TO_L2:DATA\n"
65 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_CACHE_MISS:DATA\n"
66 "PRESET,PAPI_L2_DCH,DERIVED_SUB,REQUESTS_TO_L2:DATA,L2_CACHE_MISS:DATA\n"
67 "PRESET,PAPI_L2_TCA,NOT_DERIVED,REQUESTS_TO_L2:ALL\n"
68 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS:DATA\n"
69 "PRESET,PAPI_L2_TCH,DERIVED_SUB,REQUESTS_TO_L2:INSTRUCTIONS:DATA,L2_CACHE_MISS:ALL\n"
70 "#\n"
71 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1_DTLB_AND_L2_DTLB_MISS\n"
72 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
73 "PRESET,PAPI_TLB_TL,DERIVED_ADD,L1_DTLB_AND_L2_DTLB_MISS,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
74 "#\n"
75 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
76 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
77 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
78 "#\n"
79 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DECODER_EMPTY\n"
80 "PRESET,PAPI_RES_STL,NOT_DERIVED,DISPATCH_STALLS\n"
81 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
82 "#\n"
83 "PRESET,PAPI_FPU_IDL,NOT_DERIVED,CYCLES_NO_FPU_OPS_RETIRED\n"
84 "PRESET,PAPI_FML_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_MULTIPLY\n"
85 "PRESET,PAPI_FAD_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_ADD\n"
86 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_MMX_AND_FP_INSTRUCTIONS:PACKED_SSE_AND_SSE2\n"
87 "# This definition give an accurate count of the instructions retired through the FP unit\n"
88 "# It counts just about everything except MMX and 3DNow instructions\n"
89 "# Unfortunately, it also counts loads and stores. Therefore the count will be uniformly\n"
90 "# high, but proportional to the work done.\n"
91 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_MMX_AND_FP_INSTRUCTIONS:X87:SCALAR_SSE_AND_SSE2:PACKED_SSE_AND_SSE2\n"
92 "#/* This definition is speculative but gives good answers on our simple test cases\n"
93 "# It overcounts FP operations, sometimes by A LOT, but doesn't count loads and stores\n"
94 "PRESET,PAPI_FP_OPS,NOT_DERIVED,DISPATCHED_FPU:OPS_MULTIPLY:OPS_ADD,NOTE,'Counts speculative adds and multiplies. Variable and higher than theoretical.'\n"
95 "#\n"
96 "CPU,AMD64 FPU RETIRED\n"
97 "#\n"
98 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_MMX_AND_FP_INSTRUCTIONS:X87:SCALAR_SSE_AND_SSE2:PACKED_SSE_AND_SSE2,NOTE,'Counts all retired floating point operations, including data movement. Precise, and proportional to work done, but much higher than theoretical.'\n"
99 "#\n"
100 "CPU,AMD64 FPU SPECULATIVE\n"
101 "#\n"
102 "PRESET,PAPI_FP_OPS,NOT_DERIVED,DISPATCHED_FPU:OPS_MULTIPLY:OPS_ADD,NOTE,'Counts speculative adds and multiplies. Variable and higher than theoretical.'\n"
103 "#\n"
104 "CPU,AMD64 FPU SSE_SP\n"
105 "#\n"
106 "PRESET,PAPI_FP_OPS,DERIVED_SUB,RETIRED_MMX_AND_FP_INSTRUCTIONS:X87:SCALAR_SSE_AND_SSE2:PACKED_SSE_AND_SSE2,DISPATCHED_FPU:OPS_STORE,NOTE,'Counts retired ops corrected for data motion. Optimized for single precision; lower than theoretical.'\n"
107 "#\n"
108 "CPU,AMD64 FPU SSE_DP\n"
109 "#\n"
110 "PRESET,PAPI_FP_OPS,DERIVED_SUB,RETIRED_MMX_AND_FP_INSTRUCTIONS:X87:SCALAR_SSE_AND_SSE2:PACKED_SSE_AND_SSE2,DISPATCHED_FPU:OPS_STORE_PIPE_LOAD_OPS,NOTE,'Counts retired ops corrected for data motion. Optimized for double precision; lower than theoretical.'\n"
111 "#\n"
112 "########################\n"
113 "# AMD64 #\n"
114 "########################\n"
115 "CPU,AMD64 (Barcelona)\n"
116 "CPU,AMD64 (Barcelona RevB)\n"
117 "CPU,AMD64 (Barcelona RevC)\n"
118 "CPU,AMD64 (Family 10h RevB Barcelona)\n"
119 "CPU,AMD64 (Family 10h RevC Shanghai)\n"
120 "CPU,AMD64 (Family 10h RevD Istanbul)\n"
121 "CPU,AMD64 (Family 10h RevE)\n"
122 "CPU,amd64_fam10h_barcelona\n"
123 "CPU,amd64_fam10h_shanghai\n"
124 "CPU,amd64_fam10h_istanbul\n"
125 "CPU,amd64_fam11h_turion\n"
126 "#\n"
127 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
128 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
129 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
130 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
131 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
132 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
133 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
134 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
135 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES\n"
136 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
137 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
138 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
139 "#\n"
140 "PRESET,PAPI_L2_ICA,NOT_DERIVED,REQUESTS_TO_L2:INSTRUCTIONS\n"
141 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS\n"
142 "PRESET,PAPI_L2_ICH,NOT_DERIVED,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
143 "PRESET,PAPI_L2_DCA,NOT_DERIVED,REQUESTS_TO_L2:DATA\n"
144 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_CACHE_MISS:DATA\n"
145 "PRESET,PAPI_L2_DCH,DERIVED_SUB,REQUESTS_TO_L2:DATA,L2_CACHE_MISS:DATA\n"
146 "PRESET,PAPI_L2_TCA,NOT_DERIVED,REQUESTS_TO_L2:ALL\n"
147 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS:DATA\n"
148 "PRESET,PAPI_L2_TCH,DERIVED_SUB,REQUESTS_TO_L2:INSTRUCTIONS:DATA,L2_CACHE_MISS:ALL\n"
149 "#\n"
150 "# no L3_ preset definitions for multi-cores with shared L3 cache,\n"
151 "# as long as L3 events are automatically shadowed from core- to chip-space\n"
152 "# PRESET,PAPI_L3_TCR,NOT_DERIVED,READ_REQUEST_TO_L3_CACHE:ALL\n"
153 "# PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_CACHE_MISSES:ALL\n"
154 "# PRESET,PAPI_L3_TCH,DERIVED_SUB,READ_REQUEST_TO_L3_CACHE:ALL,L3_CACHE_MISSES:ALL\n"
155 "#\n"
156 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1_DTLB_AND_L2_DTLB_MISS:ALL\n"
157 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1_ITLB_MISS_AND_L2_ITLB_MISS:ALL\n"
158 "PRESET,PAPI_TLB_TL,DERIVED_ADD,L1_DTLB_AND_L2_DTLB_MISS:ALL,L1_ITLB_MISS_AND_L2_ITLB_MISS:ALL\n"
159 "#\n"
160 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
161 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
162 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
163 "#\n"
164 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DECODER_EMPTY\n"
165 "PRESET,PAPI_RES_STL,NOT_DERIVED,DISPATCH_STALLS\n"
166 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
167 "#\n"
168 "PRESET,PAPI_FPU_IDL,NOT_DERIVED,CYCLES_NO_FPU_OPS_RETIRED\n"
169 "PRESET,PAPI_FML_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_MULTIPLY\n"
170 "PRESET,PAPI_FAD_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_ADD\n"
171 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_MMX_AND_FP_INSTRUCTIONS:PACKED_SSE_AND_SSE2\n"
172 "#\n"
173 "# An analysis by Bill Homer of Cray indicates accurate counts over a range of conditions\n"
174 "# John McCalpin reports that OP_TYPE expands packed operation counts appropriately.\n"
175 "# Therefore, it is included in FP_OPS, but not in FP_INS.\n"
176 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS\n"
177 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:OP_TYPE\n"
178 "PRESET,PAPI_SP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:SINGLE_DIV_OPS\n"
179 "PRESET,PAPI_DP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:DOUBLE_DIV_OPS\n"
180 "#\n"
181 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_MUL_OPS:DOUBLE_MUL_OPS:OP_TYPE\n"
182 "PRESET,PAPI_FAD_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:DOUBLE_ADD_SUB_OPS:OP_TYPE,NOTE,'Also includes subtract instructions'\n"
183 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS:OP_TYPE,NOTE,'Counts both divide and square root instructions'\n"
184 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS:OP_TYPE,NOTE,'Counts both divide and square root instructions'\n"
185 "########################\n"
186 "# AMD64 fam12h llano #\n"
187 "########################\n"
188 "CPU,amd64_fam12h_llano\n"
189 "#\n"
190 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
191 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
192 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
193 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
194 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
195 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
196 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
197 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
198 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES\n"
199 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
200 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
201 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
202 "#\n"
203 "PRESET,PAPI_L2_ICA,NOT_DERIVED,REQUESTS_TO_L2:INSTRUCTIONS\n"
204 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS\n"
205 "PRESET,PAPI_L2_ICH,NOT_DERIVED,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
206 "PRESET,PAPI_L2_DCA,NOT_DERIVED,REQUESTS_TO_L2:DATA\n"
207 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_CACHE_MISS:DATA\n"
208 "PRESET,PAPI_L2_DCH,DERIVED_SUB,REQUESTS_TO_L2:DATA,L2_CACHE_MISS:DATA\n"
209 "PRESET,PAPI_L2_TCA,NOT_DERIVED,REQUESTS_TO_L2:ALL\n"
210 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS:DATA\n"
211 "PRESET,PAPI_L2_TCH,DERIVED_SUB,REQUESTS_TO_L2:INSTRUCTIONS:DATA,L2_CACHE_MISS:ALL\n"
212 "#\n"
213 "# no L3_ preset definitions for multi-cores with shared L3 cache,\n"
214 "# as long as L3 events are automatically shadowed from core- to chip-space\n"
215 "# PRESET,PAPI_L3_TCR,NOT_DERIVED,READ_REQUEST_TO_L3_CACHE:ALL\n"
216 "# PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_CACHE_MISSES:ALL\n"
217 "# PRESET,PAPI_L3_TCH,DERIVED_SUB,READ_REQUEST_TO_L3_CACHE:ALL,L3_CACHE_MISSES:ALL\n"
218 "#\n"
219 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1_DTLB_AND_L2_DTLB_MISS:ALL\n"
220 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1_ITLB_MISS_AND_L2_ITLB_MISS:ALL\n"
221 "PRESET,PAPI_TLB_TL,DERIVED_ADD,L1_DTLB_AND_L2_DTLB_MISS:ALL,L1_ITLB_MISS_AND_L2_ITLB_MISS:ALL\n"
222 "#\n"
223 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
224 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
225 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
226 "#\n"
227 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DECODER_EMPTY\n"
228 "PRESET,PAPI_RES_STL,NOT_DERIVED,DISPATCH_STALLS\n"
229 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
230 "#\n"
231 "PRESET,PAPI_FPU_IDL,NOT_DERIVED,CYCLES_NO_FPU_OPS_RETIRED\n"
232 "PRESET,PAPI_FML_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_MULTIPLY\n"
233 "PRESET,PAPI_FAD_INS,NOT_DERIVED,DISPATCHED_FPU:OPS_ADD\n"
234 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_MMX_AND_FP_INSTRUCTIONS:SSE_AND_SSE2\n"
235 "#\n"
236 "# An analysis by Bill Homer of Cray indicates accurate counts over a range of conditions\n"
237 "# John McCalpin reports that OP_TYPE expands packed operation counts appropriately.\n"
238 "# Therefore, it is included in FP_OPS, but not in FP_INS.\n"
239 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS\n"
240 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:OP_TYPE\n"
241 "PRESET,PAPI_SP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:SINGLE_DIV_OPS\n"
242 "PRESET,PAPI_DP_OPS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:DOUBLE_DIV_OPS\n"
243 "#\n"
244 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_MUL_OPS:DOUBLE_MUL_OPS:OP_TYPE\n"
245 "PRESET,PAPI_FAD_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:DOUBLE_ADD_SUB_OPS:OP_TYPE,NOTE,'Also includes subtract instructions'\n"
246 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS:OP_TYPE,NOTE,'Counts both divide and square root instructions'\n"
247 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS:OP_TYPE,NOTE,'Counts both divide and square root instructions'\n"
248 "#########################\n"
249 "# AMD Fam14h Bobcat #\n"
250 "#########################\n"
251 "#\n"
252 "CPU,amd64_fam14h_bobcat\n"
253 "#\n"
254 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
255 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
256 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
257 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
258 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
259 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
260 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
261 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
262 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES\n"
263 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
264 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
265 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
266 "PRESET,PAPI_L2_ICA,NOT_DERIVED,REQUESTS_TO_L2:INSTRUCTIONS\n"
267 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS\n"
268 "PRESET,PAPI_L2_ICH,NOT_DERIVED,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
269 "PRESET,PAPI_L2_DCA,NOT_DERIVED,REQUESTS_TO_L2:DATA\n"
270 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_CACHE_MISS:DATA\n"
271 "PRESET,PAPI_L2_DCH,DERIVED_SUB,REQUESTS_TO_L2:DATA,L2_CACHE_MISS:DATA\n"
272 "PRESET,PAPI_L2_TCA,NOT_DERIVED,REQUESTS_TO_L2:ALL\n"
273 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS:DATA\n"
274 "PRESET,PAPI_L2_TCH,DERIVED_SUB,REQUESTS_TO_L2:INSTRUCTIONS:DATA,L2_CACHE_MISS:ALL\n"
275 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
276 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
277 "PRESET,PAPI_TLB_TL,DERIVED_ADD,DTLB_MISS,L1_ITLB_MISS_AND_L2_ITLB_MISS\n"
278 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
279 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
280 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
281 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
282 "PRESET,PAPI_FPU_IDL,NOT_DERIVED,CYCLES_NO_FPU_OPS_RETIRED\n"
283 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_FLOATING_POINT_INSTRUCTIONS:ALL\n"
284 "PRESET,PAPI_FP_OPS,NOT_DERIVED,DISPATCHED_FPU:ANY\n"
285 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:ALL\n"
286 "PRESET,PAPI_VEC_SP,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:SINGLE_DIV_OPS\n"
287 "PRESET,PAPI_VEC_DP,NOT_DERIVED,RETIRED_SSE_OPERATIONS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:DOUBLE_DIV_OPS\n"
288 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_MUL_OPS:DOUBLE_MUL_OPS\n"
289 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS\n"
290 "#\n"
291 "CPU,AMD64 (Family 15h RevB)\n"
292 "CPU,amd64_fam15h_interlagos\n"
293 "#\n"
294 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
295 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
296 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
297 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
298 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
299 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
300 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES:DC_MISS_STREAMING_STORE\n"
301 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
302 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES:DC_MISS_STREAMING_STORE\n"
303 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
304 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES:DC_MISS_STREAMING_STORE\n"
305 "PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES:DC_MISS_STREAMING_STORE,INSTRUCTION_CACHE_MISSES\n"
306 "#\n"
307 "PRESET,PAPI_L2_ICA,NOT_DERIVED,REQUESTS_TO_L2:INSTRUCTIONS\n"
308 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS\n"
309 "PRESET,PAPI_L2_ICH,NOT_DERIVED,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
310 "PRESET,PAPI_L2_DCA,NOT_DERIVED,REQUESTS_TO_L2:DATA\n"
311 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_CACHE_MISS:DATA\n"
312 "PRESET,PAPI_L2_DCH,DERIVED_SUB,REQUESTS_TO_L2:DATA,L2_CACHE_MISS:DATA\n"
313 "PRESET,PAPI_L2_TCA,NOT_DERIVED,REQUESTS_TO_L2:ALL\n"
314 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS:INSTRUCTIONS:DATA\n"
315 "PRESET,PAPI_L2_TCH,DERIVED_SUB,REQUESTS_TO_L2:INSTRUCTIONS:DATA,L2_CACHE_MISS:ALL\n"
316 "#\n"
317 "# not implemented: PRESET,PAPI_L3_TCR,NOT_DERIVED,READ_REQUEST_TO_L3_CACHE:ALL\n"
318 "# not implemented: PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_CACHE_MISSES:ALL\n"
319 "# not implemented: PRESET,PAPI_L3_TCH,DERIVED_SUB,READ_REQUEST_TO_L3_CACHE:ALL,L3_CACHE_MISSES:ALL\n"
320 "#\n"
321 "PRESET,PAPI_TLB_DM,NOT_DERIVED,UNIFIED_TLB_MISS:4K_DATA:2M_DATA:1GB_DATA\n"
322 "PRESET,PAPI_TLB_IM,NOT_DERIVED,UNIFIED_TLB_MISS:4K_INST:2M_INST:1G_INST\n"
323 "PRESET,PAPI_TLB_TL,NOT_DERIVED,UNIFIED_TLB_MISS:ALL\n"
324 "#\n"
325 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
326 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
327 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
328 "PRESET,PAPI_BR_PRC,DERIVED_SUB,RETIRED_BRANCH_INSTRUCTIONS,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
329 "#\n"
330 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DECODER_EMPTY\n"
331 "PRESET,PAPI_RES_STL,NOT_DERIVED,DISPATCH_STALLS\n"
332 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
333 "#\n"
334 "PRESET,PAPI_FPU_IDL,NOT_DERIVED,CYCLES_FPU_EMPTY\n"
335 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_MMX_FP_INSTRUCTIONS:SSE\n"
336 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_SSE_OPS:ALL\n"
337 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_SSE_OPS:ALL\n"
338 "PRESET,PAPI_SP_OPS,NOT_DERIVED,RETIRED_SSE_OPS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:SINGLE_DIV_OPS:SINGLE_MUL_ADD_OPS\n"
339 "PRESET,PAPI_DP_OPS,NOT_DERIVED,RETIRED_SSE_OPS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:DOUBLE_DIV_OPS:DOUBLE_MUL_ADD_OPS\n"
340 "#\n"
341 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_OPS:SINGLE_MUL_OPS:DOUBLE_MUL_OPS:SINGLE_MUL_ADD_OPS:DOUBLE_MUL_ADD_OPS,NOTE,'Also includes multiply-add instructions'\n"
342 "PRESET,PAPI_FAD_INS,NOT_DERIVED,RETIRED_SSE_OPS:SINGLE_ADD_SUB_OPS:DOUBLE_ADD_SUB_OPS:SINGLE_MUL_ADD_OPS:DOUBLE_MUL_ADD_OPS,NOTE,'Also includes subtract and multiply-add instructions'\n"
343 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_OPS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS,NOTE,'Counts both divide and square root instructions'\n"
344 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,RETIRED_SSE_OPS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS,NOTE,'Counts both divide and square root instructions'\n"
345 "#\n"
346 "#\n"
347 "CPU,amd64_fam16h\n"
348 "#\n"
349 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
350 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
351 "PRESET,PAPI_L1_ICH,DERIVED_SUB,INSTRUCTION_CACHE_FETCHES,INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM,INSTRUCTION_CACHE_REFILLS_FROM_L2\n"
352 "PRESET,PAPI_L1_ICM,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
353 "PRESET,PAPI_L1_ICA,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
354 "PRESET,PAPI_L1_ICR,NOT_DERIVED,INSTRUCTION_CACHE_FETCHES\n"
355 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_CACHE_MISSES\n"
356 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
357 "#PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_CACHE_ACCESSES,DATA_CACHE_MISSES:DC_MISS_STREAMING_STORE\n"
358 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES\n"
359 "PRESET,PAPI_L1_TCM,DERIVED_ADD,INSTRUCTION_CACHE_MISSES,DATA_CACHE_MISSES\n"
360 "# Only have 3 slots???\n"
361 "#PRESET,PAPI_L1_TCH,DERIVED_POSTFIX,N0|N1|+|N2|-|N3|-|,DATA_CACHE_ACCESSES,INSTRUCTION_CACHE_FETCHES,DATA_CACHE_MISSES,INSTRUCTION_CACHE_MISSES\n"
362 "#\n"
363 "PRESET,PAPI_L2_ICA,NOT_DERIVED,INSTRUCTION_CACHE_MISSES\n"
364 "#\n"
365 "# Note, need access to special L2 uncore events\n"
366 "# to get L2 related events\n"
367 "#\n"
368 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
369 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
370 "PRESET,PAPI_TLB_TL,DERIVED_ADD,DTLB_MISS,ITLB_MISS\n"
371 "#\n"
372 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
373 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
374 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
375 "#\n"
376 "PRESET,PAPI_STL_ICY,NOT_DERIVED,INSTRUCTION_FETCH_STALL\n"
377 "PRESET,PAPI_HW_INT,NOT_DERIVED,INTERRUPTS_TAKEN\n"
378 "#\n"
379 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS\n"
380 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS\n"
381 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS\n"
382 "PRESET,PAPI_SP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SINGLE_ADD_SUB_OPS:SINGLE_MUL_OPS:SINGLE_DIV_OPS\n"
383 "PRESET,PAPI_DP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:DOUBLE_ADD_SUB_OPS:DOUBLE_MUL_OPS:DOUBLE_DIV_OPS\n"
384 "#\n"
385 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SINGLE_MUL_OPS:DOUBLE_MUL_OPS\n"
386 "PRESET,PAPI_FAD_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SINGLE_ADD_SUB_OPS:DOUBLE_ADD_SUB_OPS\n"
387 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS,NOTE,'Counts both divide and square root instructions'\n"
388 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SINGLE_DIV_OPS:DOUBLE_DIV_OPS,NOTE,'Counts both divide and square root instructions'\n"
389 "#\n"
390 "#\n"
391 "CPU,amd64_fam17h\n"
392 "#\n"
393 "PRESET,PAPI_TOT_INS,NOT_DERIVED,RETIRED_INSTRUCTIONS\n"
394 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLES_NOT_IN_HALT\n"
395 "PRESET,PAPI_L1_ICH,DERIVED_SUB,32_BYTE_INSTRUCTION_CACHE_FETCH,32_BYTE_INSTRUCTION_CACHE_MISSES\n"
396 "PRESET,PAPI_L1_ICM,NOT_DERIVED,32_BYTE_INSTRUCTION_CACHE_MISSES\n"
397 "PRESET,PAPI_L1_ICA,NOT_DERIVED,32_BYTE_INSTRUCTION_CACHE_FETCH\n"
398 "PRESET,PAPI_L1_ICR,NOT_DERIVED,32_BYTE_INSTRUCTION_CACHE_FETCH\n"
399 "# Same event code, confusing name?\n"
400 "#PRESET,PAPI_L1_DCM,NOT_DERIVED,MAB_ALLOCATION_BY_PIPE\n"
401 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_CACHE_ACCESSES\n"
402 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_CACHE_ACCESSES,32_BYTE_INSTRUCTION_CACHE_FETCH\n"
403 "PRESET,PAPI_L2_ICA,NOT_DERIVED,32_BYTE_INSTRUCTION_CACHE_MISSES\n"
404 "#\n"
405 "# Note, need access to special L2 uncore events\n"
406 "# to get L2 related events\n"
407 "#\n"
408 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1_DTLB_MISS:TLB_RELOAD_1G_L2_MISS:TLB_RELOAD_2M_L2_MISS:TLB_RELOAD_32K_L2_MISS:TLB_RELOAD_4K_L2_MISS:TLB_RELOAD_1G_L2_HIT:TLB_RELOAD_2M_L2_HIT:TLB_RELOAD_32K_L2_HIT:TLB_RELOAD_4K_L2_HIT\n"
409 "PRESET,PAPI_TLB_IM,DERIVED_ADD,L1_ITLB_MISS_L2_ITLB_HIT,L1_ITLB_MISS_L2_ITLB_MISS:IF1G:IF2M:IF4K\n"
410 "#\n"
411 "PRESET,PAPI_BR_INS,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS\n"
412 "PRESET,PAPI_BR_TKN,NOT_DERIVED,RETIRED_TAKEN_BRANCH_INSTRUCTIONS\n"
413 "# Note, the processor supports various kinds of mispredictions\n"
414 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_BRANCH_INSTRUCTIONS_MISPREDICTED\n"
415 "#\n"
416 "PRESET,PAPI_STL_ICY,NOT_DERIVED,INSTRUCTION_PIPE_STALL:IC_STALL_ANY\n"
417 "#\n"
418 "PRESET,PAPI_VEC_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:DP_MULT_ADD_FLOPS:DP_DIV_FLOPS:DP_MULT_FLOPS:DP_ADD_SUB_FLOPS:SP_MULT_ADD_FLOPS:SP_DIV_FLOPS:SP_MULT_FLOPS:SP_ADD_SUB_FLOPS\n"
419 "PRESET,PAPI_FP_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:DP_MULT_ADD_FLOPS:DP_DIV_FLOPS:DP_MULT_FLOPS:DP_ADD_SUB_FLOPS:SP_MULT_ADD_FLOPS:SP_DIV_FLOPS:SP_MULT_FLOPS:SP_ADD_SUB_FLOPS\n"
420 "PRESET,PAPI_FP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:DP_MULT_ADD_FLOPS:DP_DIV_FLOPS:DP_MULT_FLOPS:DP_ADD_SUB_FLOPS:SP_MULT_ADD_FLOPS:SP_DIV_FLOPS:SP_MULT_FLOPS:SP_ADD_SUB_FLOPS\n"
421 "PRESET,PAPI_SP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SP_ADD_SUB_FLOPS:SP_MULT_FLOPS:SP_MULT_ADD_FLOPS:SP_DIV_FLOPS\n"
422 "PRESET,PAPI_DP_OPS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:DP_ADD_SUB_FLOPS:DP_MULT_FLOPS:DP_MULT_ADD_FLOPS:DP_DIV_FLOPS\n"
423 "#\n"
424 "PRESET,PAPI_FML_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SP_MULT_FLOPS:DP_MULT_FLOPS\n"
425 "PRESET,PAPI_FAD_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SP_ADD_SUB_FLOPS:DP_ADD_SUB_FLOPS\n"
426 "PRESET,PAPI_FDV_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SP_DIV_FLOPS:DP_DIV_FLOPS,NOTE,'Counts both divide and square root instructions'\n"
427 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,RETIRED_SSE_AVX_OPERATIONS:SP_DIV_FLOPS:DP_DIV_FLOPS,NOTE,'Counts both divide and square root instructions'\n"
428 "#\n"
429 "#\n"
430 "CPU,Intel architectural PMU\n"
431 "CPU,ix86arch\n"
432 "#\n"
433 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_INSTRUCTIONS_RETIRED\n"
434 "PRESET,PAPI_BR_MSP,NOT_DERIVED,RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS\n"
435 "#\n"
436 "# Intel Atom\n"
437 "CPU,Intel Atom\n"
438 "CPU,atom\n"
439 "#\n"
440 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_RETIRED\n"
441 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
442 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
443 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE:MISSES\n"
444 "PRESET,PAPI_L1_DCM,DERIVED_SUB,L2_RQSTS:SELF:MESI,ICACHE:MISSES\n"
445 "PRESET,PAPI_L1_ICA,NOT_DERIVED,ICACHE:ACCESSES\n"
446 "PRESET,PAPI_L1_ICH,DERIVED_SUB,ICACHE:ACCESSES,ICACHE:MISSES\n"
447 "#PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_CACHE:LD:ST\n"
448 "PRESET,PAPI_L1_DCA,DERIVED_ADD,L1D_CACHE:LD,L1D_CACHE:ST\n"
449 "PRESET,PAPI_L1_TCM,NOT_DERIVED,L2_RQSTS:SELF:MESI\n"
450 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_LD:SELF:ANY:MESI\n"
451 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_ST:SELF:MESI\n"
452 "PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_LINES_IN:SELF:ANY,BUS_TRANS_IFETCH:SELF\n"
453 "PRESET,PAPI_L2_ICM,NOT_DERIVED,BUS_TRANS_IFETCH:SELF\n"
454 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_LINES_IN:SELF:ANY\n"
455 "PRESET,PAPI_L2_LDM,DERIVED_SUB,L2_LINES_IN:SELF:ANY,L2_M_LINES_IN:SELF\n"
456 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_M_LINES_IN:SELF\n"
457 "PRESET,PAPI_L2_DCA,DERIVED_ADD,L2_LD:SELF:ANY:MESI,L2_ST:SELF:MESI\n"
458 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_LD:SELF:ANY:MESI\n"
459 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
460 "PRESET,PAPI_L2_ICH,DERIVED_SUB,L2_IFETCH:SELF:MESI,BUS_TRANS_IFETCH:SELF\n"
461 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_IFETCH:SELF:MESI\n"
462 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_RQSTS:SELF:ANY:MESI,L2_LINES_IN:SELF:ANY\n"
463 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:SELF:ANY:MESI\n"
464 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_LD:SELF:ANY:MESI,L2_IFETCH:SELF:MESI\n"
465 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
466 "#\n"
467 "PRESET,PAPI_CA_SNP,NOT_DERIVED,EXT_SNOOP:SELF:MESI\n"
468 "PRESET,PAPI_CA_SHR,NOT_DERIVED,L2_RQSTS:SELF:ANY:S_STATE\n"
469 "PRESET,PAPI_CA_CLN,NOT_DERIVED,BUS_TRANS_RFO:SELF\n"
470 "PRESET,PAPI_CA_ITV,NOT_DERIVED,BUS_TRANS_INVAL:SELF\n"
471 "#\n"
472 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB:MISSES\n"
473 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DATA_TLB_MISSES:DTLB_MISS\n"
474 "#\n"
475 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_INST_RETIRED:TAKEN\n"
476 "PRESET,PAPI_BR_NTK,NOT_DERIVED,BR_INST_RETIRED:PRED_NOT_TAKEN:MISPRED_NOT_TAKEN\n"
477 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_INSTRUCTIONS_RETIRED\n"
478 "PRESET,PAPI_BR_MSP,NOT_DERIVED,MISPREDICTED_BRANCH_RETIRED\n"
479 "#\n"
480 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,MACRO_INSTS:ALL_DECODED\n"
481 "PRESET,PAPI_HW_INT,NOT_DERIVED,HW_INT_RCV\n"
482 "#PRESET,PAPI_RES_STL,NOT_DERIVED,RESOURCE_STALLS:ANY\n"
483 "#\n"
484 "#PRESET,PAPI_FP_INS,NOT_DERIVED,X87_COMP_OPS_EXE:ANY_AR\n"
485 "PRESET,PAPI_FP_INS,NOT_DERIVED,SIMD_INST_RETIRED:ANY\n"
486 "#PRESET,PAPI_FP_OPS,NOT_DERIVED,X87_COMP_OPS_EXE:ANY_AR\n"
487 "#PRESET,PAPI_FP_OPS,NOT_DERIVED,SIMD_UOPS_EXEC:AR\n"
488 "PRESET,PAPI_FP_OPS,DERIVED_ADD,SIMD_INST_RETIRED:ANY,X87_COMP_OPS_EXE:ANY_AR\n"
489 "PRESET,PAPI_FML_INS,NOT_DERIVED,MUL:AR\n"
490 "PRESET,PAPI_FDV_INS,NOT_DERIVED,DIV:AR\n"
491 "PRESET,PAPI_VEC_INS,NOT_DERIVED,SIMD_INST_RETIRED:VECTOR\n"
492 "#\n"
493 "# Intel Atom Silvermont\n"
494 "CPU,slm\n"
495 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_RETIRED\n"
496 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
497 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
498 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE:MISSES\n"
499 "PRESET,PAPI_L1_ICA,NOT_DERIVED,ICACHE:ACCESSES\n"
500 "PRESET,PAPI_L1_ICH,DERIVED_SUB,ICACHE:ACCESSES,ICACHE:MISSES\n"
501 "PRESET,PAPI_L1_TCM,NOT_DERIVED,LLC_REFERENCES\n"
502 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LLC_MISSES\n"
503 "PRESET,PAPI_L2_TCH,DERIVED_SUB,LLC_REFERENCES,LLC_MISSES\n"
504 "PRESET,PAPI_L2_TCA,NOT_DERIVED,LLC_REFERENCES\n"
505 "#\n"
506 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED:JCC\n"
507 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_INSTRUCTIONS_RETIRED\n"
508 "PRESET,PAPI_BR_MSP,NOT_DERIVED,MISPREDICTED_BRANCH_RETIRED\n"
509 "#\n"
510 "PRESET,PAPI_RES_STL,NOT_DERIVED,UOPS_RETIRED:STALLS\n"
511 "#\n"
512 "#PRESET,PAPI_FP_INS,NOT_DERIVED,UOPS_RETIRED:X87\n"
513 "PRESET,PAPI_FML_INS,NOT_DERIVED,UOPS_RETIRED:MUL\n"
514 "PRESET,PAPI_FDV_INS,NOT_DERIVED,UOPS_RETIRED:DIV\n"
515 "#\n"
516 "CPU,Intel Nehalem\n"
517 "CPU,Intel Westmere\n"
518 "CPU,nhm\n"
519 "CPU,nhm_ex\n"
520 "CPU,wsm\n"
521 "CPU,wsm_dp\n"
522 "#\n"
523 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
524 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
525 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTION_RETIRED\n"
526 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I:MISSES\n"
527 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I:READS\n"
528 "PRESET,PAPI_L1_ICH,NOT_DERIVED,L1I:HITS\n"
529 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D:REPL\n"
530 "#PRESET,PAPI_L1_TCM,NOT_DERIVED,L2_RQSTS:SELF:MESI\n"
531 "#PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_LD:SELF:ANY:MESI\n"
532 "#PRESET,PAPI_L1_STM,NOT_DERIVED,L2_ST:SELF:MESI\n"
533 "# OLD VALUE PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_RQSTS:MISS,L2_RQSTS:IFETCH_MISS\n"
534 "PRESET,PAPI_L2_DCM,DERIVED_ADD,L2_RQSTS:LD_MISS,L2_RQSTS:RFO_MISS\n"
535 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_RQSTS:IFETCH_MISS\n"
536 "# OLD VALUE PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_RQSTS:MISS\n"
537 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
538 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2_RQSTS:LD_MISS\n"
539 "#PRESET,PAPI_L2_STM,NOT_DERIVED,L2_M_LINES_IN:SELF\n"
540 "# OLD VALUE PRESET,PAPI_L2_DCA,NOT_DERIVED,L2_DATA_RQSTS:ANY\n"
541 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L1D:REPL\n"
542 "# OLD VALUE PRESET,PAPI_L2_DCR,DERIVED_SUB,L2_RQSTS:LOADS,L2_RQSTS:IFETCHES\n"
543 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_RQSTS:LOADS\n"
544 "#PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
545 "PRESET,PAPI_L2_ICH,NOT_DERIVED,L2_RQSTS:IFETCH_HIT\n"
546 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_RQSTS:IFETCHES\n"
547 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_RQSTS:REFERENCES, L2_RQSTS:MISS\n"
548 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:REFERENCES\n"
549 "# OLD VALUE PRESET,PAPI_L2_TCR,NOT_DERIVED,L2_RQSTS:LOADS\n"
550 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_RQSTS:LOADS,L2_RQSTS:IFETCHES\n"
551 "#PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
552 "#\n"
553 "PRESET,PAPI_L1_ICR,NOT_DERIVED,L1I:READS\n"
554 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_RQSTS:LOADS\n"
555 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_WRITE:RFO_MESI\n"
556 "PRESET,PAPI_L1_TCM,DERIVED_SUB,L2_RQSTS:REFERENCES,L2_RQSTS:PREFETCHES\n"
557 "PRESET,PAPI_L2_DCH,DERIVED_ADD,L2_RQSTS:LD_HIT,L2_RQSTS:RFO_HIT\n"
558 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_WRITE:RFO_MESI\n"
559 "PRESET,PAPI_L2_ICR,NOT_DERIVED,L2_RQSTS:IFETCHES\n"
560 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
561 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_RQSTS:RFOS\n"
562 "PRESET,PAPI_L3_DCA,DERIVED_ADD,L2_RQSTS:LD_MISS,L2_RQSTS:RFO_MISS\n"
563 "PRESET,PAPI_L3_DCR,NOT_DERIVED,L2_RQSTS:LD_MISS\n"
564 "PRESET,PAPI_L3_DCW,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
565 "PRESET,PAPI_L3_ICA,NOT_DERIVED,L2_RQSTS:IFETCH_MISS\n"
566 "PRESET,PAPI_L3_ICR,NOT_DERIVED,L2_RQSTS:IFETCH_MISS\n"
567 "PRESET,PAPI_L3_LDM,NOT_DERIVED,MEM_LOAD_RETIRED:L3_MISS\n"
568 "PRESET,PAPI_L3_TCA,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
569 "PRESET,PAPI_L3_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_MISSES\n"
570 "PRESET,PAPI_L3_TCR,DERIVED_ADD,L2_RQSTS:LD_MISS,L2_RQSTS:IFETCH_MISS\n"
571 "PRESET,PAPI_L3_TCW,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
572 "PRESET,PAPI_LST_INS,DERIVED_ADD,MEM_INST_RETIRED:LOADS,MEM_INST_RETIRED:STORES\n"
573 "#\n"
574 "PRESET,PAPI_LD_INS,NOT_DERIVED,MEM_INST_RETIRED:LOADS\n"
575 "PRESET,PAPI_SR_INS,NOT_DERIVED,MEM_INST_RETIRED:STORES\n"
576 "#\n"
577 "#PRESET,PAPI_CA_SHR,NOT_DERIVED,L2_RQSTS:SELF:ANY:S_STATE\n"
578 "#PRESET,PAPI_CA_CLN,NOT_DERIVED,BUS_TRANS_RFO:SELF\n"
579 "#PRESET,PAPI_CA_ITV,NOT_DERIVED,BUS_TRANS_INVAL:SELF\n"
580 "#\n"
581 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISSES:ANY\n"
582 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISSES:ANY\n"
583 "PRESET,PAPI_TLB_TL,DERIVED_ADD,ITLB_MISSES:ANY, DTLB_MISSES:ANY\n"
584 "#\n"
585 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_INST_EXEC:TAKEN\n"
586 "PRESET,PAPI_BR_NTK,DERIVED_SUB,BR_INST_EXEC:ANY, BR_INST_EXEC:TAKEN\n"
587 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_INST_EXEC:ANY\n"
588 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISP_EXEC:ANY\n"
589 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_EXEC:COND\n"
590 "PRESET,PAPI_BR_UCN,NOT_DERIVED,BR_INST_EXEC:DIRECT\n"
591 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_INST_EXEC:COND, BR_MISP_EXEC:COND\n"
592 "#\n"
593 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,MACRO_INSTS:DECODED\n"
594 "PRESET,PAPI_RES_STL,NOT_DERIVED,RESOURCE_STALLS:ANY\n"
595 "#\n"
596 "PRESET,PAPI_FP_INS,NOT_DERIVED,FP_COMP_OPS_EXE:SSE_FP\n"
597 "# PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_COMP_OPS_EXE:SSE_FP\n"
598 "# PAPI_FP_OPS counts single and double precision SCALAR operations\n"
599 "# PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_COMP_OPS_EXE:SSE_SINGLE_PRECISION:SSE_DOUBLE_PRECISION\n"
600 "# According to Stephane (Jan 2010), it's not allowed to combine unit masks for FP_COMP_OPS_EXE;\n"
601 "# we have to use two counters instead\n"
602 "#PRESET,PAPI_FP_OPS,DERIVED_ADD,FP_COMP_OPS_EXE:SSE_SINGLE_PRECISION,FP_COMP_OPS_EXE:SSE_DOUBLE_PRECISION\n"
603 "PRESET,PAPI_FP_OPS,DERIVED_ADD,FP_COMP_OPS_EXE:SSE_FP,FP_COMP_OPS_EXE:X87\n"
604 "# PAPI_SP_OPS = single precision scalar ops + 3 * packed ops\n"
605 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|N1|3|*|+|,FP_COMP_OPS_EXE:SSE_SINGLE_PRECISION,FP_COMP_OPS_EXE:SSE_FP_PACKED\n"
606 "PRESET,PAPI_DP_OPS,DERIVED_ADD,FP_COMP_OPS_EXE:SSE_DOUBLE_PRECISION,FP_COMP_OPS_EXE:SSE_FP_PACKED\n"
607 "PRESET,PAPI_VEC_SP,NOT_DERIVED,FP_COMP_OPS_EXE:SSE_FP_PACKED\n"
608 "PRESET,PAPI_VEC_DP,NOT_DERIVED,FP_COMP_OPS_EXE:SSE_FP_PACKED\n"
609 "#PRESET,PAPI_FML_INS,NOT_DERIVED,MUL\n"
610 "#PRESET,PAPI_FDV_INS,NOT_DERIVED,DIV\n"
611 "#PRESET,PAPI_VEC_INS,NOT_DERIVED,SIMD_INST_RETIRED:VECTOR\n"
612 "#\n"
613 "# Not available on Westmere\n"
614 "#\n"
615 "CPU,Intel Nehalem\n"
616 "CPU,nhm\n"
617 "CPU,nhm_ex\n"
618 "#PRESET,PAPI_HW_INT,NOT_DERIVED,HW_INT:RCV\n"
619 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_ALL_REF:ANY\n"
620 "PRESET,PAPI_L1_DCH,DERIVED_SUB,L1D_ALL_REF:ANY,L1D:REPL\n"
621 "PRESET,PAPI_L1_TCA,DERIVED_ADD,L1D_ALL_REF:ANY,L1I:READS\n"
622 "#\n"
623 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_CACHE_LD:MESI\n"
624 "PRESET,PAPI_L1_DCW,NOT_DERIVED,L1D_CACHE_ST:MESI\n"
625 "PRESET,PAPI_L1_TCR,DERIVED_ADD,L1D_CACHE_LD:MESI,L1I:READS\n"
626 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L1D_CACHE_ST:MESI\n"
627 "#\n"
628 "# Intel SandyBridge and IvyBridge\n"
629 "CPU,snb\n"
630 "CPU,snb_ep\n"
631 "CPU,ivb\n"
632 "CPU,ivb_ep\n"
633 "#\n"
634 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
635 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
636 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTION_RETIRED\n"
637 "#\n"
638 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D:REPLACEMENT\n"
639 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_RQSTS:ALL_DEMAND_DATA_RD\n"
640 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_STORE_LOCK_RQSTS:ALL\n"
641 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE:MISSES\n"
642 "PRESET,PAPI_L1_TCM,DERIVED_ADD,ICACHE:MISSES,L1D:REPLACEMENT\n"
643 "#\n"
644 "PRESET,PAPI_L2_DCM,DERIVED_SUB,LAST_LEVEL_CACHE_REFERENCES,L2_RQSTS:CODE_RD_MISS\n"
645 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
646 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L1D:REPLACEMENT\n"
647 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_RQSTS:ALL_DEMAND_DATA_RD\n"
648 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_STORE_LOCK_RQSTS:ALL\n"
649 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
650 "PRESET,PAPI_L2_ICH,NOT_DERIVED,L2_RQSTS:CODE_RD_HIT\n"
651 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_RQSTS:ALL_CODE_RD\n"
652 "PRESET,PAPI_L2_ICR,NOT_DERIVED,L2_RQSTS:ALL_CODE_RD\n"
653 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
654 "PRESET,PAPI_L2_TCA,DERIVED_ADD,L1D:REPLACEMENT,L2_RQSTS:ALL_CODE_RD\n"
655 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_RQSTS:ALL_DEMAND_DATA_RD,L2_RQSTS:ALL_CODE_RD\n"
656 "#\n"
657 "PRESET,PAPI_L3_DCA,DERIVED_SUB,LAST_LEVEL_CACHE_REFERENCES,L2_RQSTS:CODE_RD_MISS\n"
658 "PRESET,PAPI_L3_DCR,NOT_DERIVED,OFFCORE_REQUESTS:DEMAND_DATA_RD\n"
659 "PRESET,PAPI_L3_DCW,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
660 "PRESET,PAPI_L3_ICA,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
661 "PRESET,PAPI_L3_ICR,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
662 "PRESET,PAPI_L3_TCA,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
663 "PRESET,PAPI_L3_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_MISSES\n"
664 "PRESET,PAPI_L3_TCR,DERIVED_SUB,LAST_LEVEL_CACHE_REFERENCES,L2_RQSTS:RFO_MISS\n"
665 "PRESET,PAPI_L3_TCW,NOT_DERIVED,L2_RQSTS:RFO_MISS\n"
666 "#\n"
667 "PRESET,PAPI_BR_NTK,NOT_DERIVED,BR_INST_RETIRED:NOT_TAKEN\n"
668 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_INST_RETIRED:ALL_BRANCHES\n"
669 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISP_RETIRED:ALL_BRANCHES\n"
670 "#\n"
671 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISSES:CAUSES_A_WALK\n"
672 "#\n"
673 "PRESET,PAPI_FDV_INS,NOT_DERIVED,ARITH:FPU_DIV\n"
674 "PRESET,PAPI_STL_ICY,NOT_DERIVED,ILD_STALL:IQ_FULL\n"
675 "PRESET,PAPI_LD_INS,NOT_DERIVED,MEM_UOP_RETIRED:ANY_LOADS\n"
676 "PRESET,PAPI_SR_INS,NOT_DERIVED,MEM_UOP_RETIRED:ANY_STORES\n"
677 "#\n"
678 "# Counts scalars only; no SSE or AVX is counted; includes speculative\n"
679 "PRESET,PAPI_FP_INS,DERIVED_ADD,FP_COMP_OPS_EXE:SSE_SCALAR_DOUBLE,FP_COMP_OPS_EXE:SSE_FP_SCALAR_SINGLE,FP_COMP_OPS_EXE:X87\n"
680 "PRESET,PAPI_FP_OPS,DERIVED_ADD,FP_COMP_OPS_EXE:SSE_SCALAR_DOUBLE,FP_COMP_OPS_EXE:SSE_FP_SCALAR_SINGLE,FP_COMP_OPS_EXE:X87\n"
681 "#\n"
682 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|N1|4|*|N2|8|*|+|+|,FP_COMP_OPS_EXE:SSE_FP_SCALAR_SINGLE,FP_COMP_OPS_EXE:SSE_PACKED_SINGLE,SIMD_FP_256:PACKED_SINGLE\n"
683 "PRESET,PAPI_DP_OPS,DERIVED_POSTFIX,N0|N1|2|*|N2|4|*|+|+|,FP_COMP_OPS_EXE:SSE_SCALAR_DOUBLE,FP_COMP_OPS_EXE:SSE_FP_PACKED_DOUBLE,SIMD_FP_256:PACKED_DOUBLE\n"
684 "PRESET,PAPI_VEC_SP,DERIVED_POSTFIX,N0|4|*|N1|8|*|+|,FP_COMP_OPS_EXE:SSE_PACKED_SINGLE,SIMD_FP_256:PACKED_SINGLE\n"
685 "PRESET,PAPI_VEC_DP,DERIVED_POSTFIX,N0|2|*|N1|4|*|+|,FP_COMP_OPS_EXE:SSE_FP_PACKED_DOUBLE,SIMD_FP_256:PACKED_DOUBLE\n"
686 "#\n"
687 "# Intel SandyBridge only\n"
688 "CPU,snb\n"
689 "CPU,snb_ep\n"
690 "#\n"
691 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_RQSTS:RFO_ANY\n"
692 "PRESET,PAPI_L2_DCH,DERIVED_ADD,L2_RQSTS:ALL_DEMAND_RD_HIT,L2_RQSTS:RFO_HITS\n"
693 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED:CONDITIONAL\n"
694 "PRESET,PAPI_BR_UCN,DERIVED_SUB,BR_INST_RETIRED:ALL_BRANCHES,BR_INST_RETIRED:CONDITIONAL\n"
695 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_INST_RETIRED:CONDITIONAL,BR_MISP_RETIRED:ALL_BRANCHES\n"
696 "PRESET,PAPI_BR_TKN,DERIVED_SUB,BR_INST_RETIRED:CONDITIONAL,BR_INST_RETIRED:NOT_TAKEN\n"
697 "PRESET,PAPI_TLB_DM,DERIVED_ADD,DTLB_LOAD_MISSES:CAUSES_A_WALK,DTLB_STORE_MISSES:CAUSES_A_WALK\n"
698 "#\n"
699 "# Intel IvyBridge only\n"
700 "CPU,ivb\n"
701 "CPU,ivb_ep\n"
702 "#\n"
703 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_RQSTS:ALL_RFO\n"
704 "PRESET,PAPI_L2_DCH,DERIVED_ADD,L2_RQSTS:DEMAND_DATA_RD_HIT,L2_RQSTS:RFO_HIT\n"
705 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED:COND\n"
706 "PRESET,PAPI_BR_UCN,DERIVED_SUB,BR_INST_RETIRED:ALL_BRANCHES,BR_INST_RETIRED:COND\n"
707 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_INST_RETIRED:COND,BR_MISP_RETIRED:ALL_BRANCHES\n"
708 "PRESET,PAPI_BR_TKN,DERIVED_SUB,BR_INST_RETIRED:COND,BR_INST_RETIRED:NOT_TAKEN\n"
709 "PRESET,PAPI_TLB_DM,DERIVED_ADD,DTLB_LOAD_MISSES:DEMAND_LD_MISS_CAUSES_A_WALK,DTLB_STORE_MISSES:CAUSES_A_WALK\n"
710 "#PRESET,PAPI_HW_INT,NOT_DERIVED,HW_INTERRUPTS\n"
711 "#\n"
712 "# Intel Haswell events\n"
713 "# Using also for Broadwell events, this is what the Linux kernel does\n"
714 "CPU,hsw\n"
715 "CPU,hsw_ep\n"
716 "CPU,bdw\n"
717 "CPU,bdw_ep\n"
718 "CPU,skl\n"
719 "# Note, libpfm4 treats Kaby Lake as just a form of skylake\n"
720 "CPU,kbl\n"
721 "CPU,skx\n"
722 "# Note, libpfm4 treats Cascade Lake-X as just a form of skylake-X\n"
723 "CPU,clx\n"
724 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_THREAD_UNHALTED:THREAD_P\n"
725 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED:ANY_P\n"
726 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
727 "#PRESET,PAPI_REF_CYC,NOT_DERIVED,CPU_CLK_THREAD_UNHALTED:REF_XCLK\n"
728 "# Loads and stores\n"
729 "PRESET,PAPI_LD_INS,NOT_DERIVED,MEM_UOPS_RETIRED:ALL_LOADS\n"
730 "PRESET,PAPI_SR_INS,NOT_DERIVED,MEM_UOPS_RETIRED:ALL_STORES\n"
731 "PRESET,PAPI_LST_INS,DERIVED_ADD,MEM_UOPS_RETIRED:ALL_LOADS,MEM_UOPS_RETIRED:ALL_STORES\n"
732 "# L1 cache\n"
733 "#PRESET,PAPI_L1_TCH,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L1_HIT\n"
734 "#PRESET,PAPI_L1_TCM,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L1_MISS\n"
735 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L2_RQSTS:ALL_CODE_RD\n"
736 "# Added by FMB\n"
737 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D:REPLACEMENT\n"
738 "PRESET,PAPI_L1_TCM,DERIVED_ADD,L1D:REPLACEMENT,L2_RQSTS:ALL_CODE_RD\n"
739 "# L2 cache\n"
740 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L2_RQSTS:ALL_DEMAND_REFERENCES\n"
741 "# NOTE on IVB it is PRESET,PAPI_L2_DCA,NOT_DERIVED,L1D:REPLACEMENT\n"
742 "#PRESET,PAPI_L2_DCH,NOT_DERIVED,L2_RQSTS:DEMAND_DATA_RD_HIT\n"
743 "#PRESET,PAPI_L2_DCM,NOT_DERIVED,L2_RQSTS:DEMAND_DATA_RD_MISS\n"
744 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_RQSTS:ALL_DEMAND_DATA_RD\n"
745 "PRESET,PAPI_L2_ICH,NOT_DERIVED,L2_RQSTS:CODE_RD_HIT\n"
746 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
747 "PRESET,PAPI_L2_ICR,NOT_DERIVED,L2_RQSTS:ALL_CODE_RD\n"
748 "#PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:REFERENCES\n"
749 "#PRESET,PAPI_L2_TCH,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L2_HIT\n"
750 "#PRESET,PAPI_L2_TCM,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L2_MISS\n"
751 "# Added by FMB\n"
752 "PRESET,PAPI_L2_DCM,DERIVED_SUB,LLC_REFERENCES,L2_RQSTS:CODE_RD_MISS\n"
753 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_RQSTS:ALL_CODE_RD\n"
754 "#PRESET,PAPI_L2_LDH,NOT_DERIVED,L2_RQSTS:DEMAND_DATA_RD_HIT\n"
755 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2_RQSTS:DEMAND_DATA_RD_MISS\n"
756 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_RQSTS:DEMAND_RFO_MISS\n"
757 "PRESET,PAPI_L2_TCA,DERIVED_ADD,L2_RQSTS:ALL_DEMAND_REFERENCES,L2_RQSTS:ALL_CODE_RD\n"
758 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LLC_REFERENCES\n"
759 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_RQSTS:ALL_DEMAND_DATA_RD,L2_RQSTS:ALL_CODE_RD\n"
760 "# L3 cache\n"
761 "#PRESET,PAPI_L3_TCA,NOT_DERIVED,LONGEST_LAT_CACHE:REFERENCE\n"
762 "#PRESET,PAPI_L3_TCH,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L3_HIT\n"
763 "#PRESET,PAPI_L3_TCM,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L3_MISS\n"
764 "# Added by FMB\n"
765 "PRESET,PAPI_L3_DCA,DERIVED_SUB,LLC_REFERENCES,L2_RQSTS:CODE_RD_MISS\n"
766 "PRESET,PAPI_L3_DCR,NOT_DERIVED,OFFCORE_REQUESTS:DEMAND_DATA_RD\n"
767 "PRESET,PAPI_L3_DCW,NOT_DERIVED,L2_RQSTS:DEMAND_RFO_MISS\n"
768 "PRESET,PAPI_L3_ICA,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
769 "PRESET,PAPI_L3_ICR,NOT_DERIVED,L2_RQSTS:CODE_RD_MISS\n"
770 "#PRESET,PAPI_L3_LDH,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L3_HIT\n"
771 "PRESET,PAPI_L3_LDM,NOT_DERIVED,MEM_LOAD_UOPS_RETIRED:L3_MISS\n"
772 "PRESET,PAPI_L3_TCA,NOT_DERIVED,LLC_REFERENCES\n"
773 "PRESET,PAPI_L3_TCM,NOT_DERIVED,LLC_MISSES\n"
774 "PRESET,PAPI_L3_TCR,DERIVED_SUB,LLC_REFERENCES,L2_RQSTS:DEMAND_RFO_MISS\n"
775 "PRESET,PAPI_L3_TCW,NOT_DERIVED,L2_RQSTS:DEMAND_RFO_MISS\n"
776 "# SMP\n"
777 "PRESET,PAPI_CA_SNP,NOT_DERIVED,OFFCORE_RESPONSE_0:SNP_ANY\n"
778 "PRESET,PAPI_CA_SHR,NOT_DERIVED,OFFCORE_REQUESTS:ALL_DATA_RD\n"
779 "PRESET,PAPI_CA_CLN,NOT_DERIVED,OFFCORE_REQUESTS:DEMAND_RFO\n"
780 "# TLB\n"
781 "PRESET,PAPI_TLB_DM,DERIVED_ADD,DTLB_LOAD_MISSES:MISS_CAUSES_A_WALK,DTLB_STORE_MISSES:MISS_CAUSES_A_WALK\n"
782 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISSES:MISS_CAUSES_A_WALK\n"
783 "# Stalls\n"
784 "PRESET,PAPI_MEM_WCY,NOT_DERIVED,RESOURCE_STALLS:SB\n"
785 "PRESET,PAPI_RES_STL,NOT_DERIVED,RESOURCE_STALLS:ANY\n"
786 "PRESET,PAPI_STL_CCY,NOT_DERIVED,UOPS_RETIRED:ALL:c=1:i=1\n"
787 "PRESET,PAPI_FUL_ICY,DERIVED_ADD,IDQ:ALL_DSB_CYCLES_4_UOPS,IDQ:ALL_MITE_CYCLES_4_UOPS\n"
788 "PRESET,PAPI_FUL_CCY,NOT_DERIVED,UOPS_RETIRED:ALL:c=4\n"
789 "# Branches\n"
790 "PRESET,PAPI_BR_UCN,DERIVED_SUB,BR_INST_RETIRED:ALL_BRANCHES,BR_INST_RETIRED:CONDITIONAL\n"
791 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED:CONDITIONAL\n"
792 "PRESET,PAPI_BR_TKN,DERIVED_SUB,BR_INST_RETIRED:CONDITIONAL,BR_INST_RETIRED:NOT_TAKEN\n"
793 "PRESET,PAPI_BR_NTK,NOT_DERIVED,BR_INST_RETIRED:NOT_TAKEN\n"
794 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISP_RETIRED:CONDITIONAL\n"
795 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_INST_RETIRED:CONDITIONAL,BR_MISP_RETIRED:CONDITIONAL\n"
796 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_INST_RETIRED:ALL_BRANCHES\n"
797 "CPU,hsw\n"
798 "CPU,hsw_ep\n"
799 "CPU,bdw\n"
800 "CPU,bdw_ep\n"
801 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_TRANS:DEMAND_DATA_RD\n"
802 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_TRANS:L1D_WB\n"
803 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_TRANS:RFO\n"
804 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_TRANS:RFO\n"
805 "PRESET,PAPI_PRF_DM,NOT_DERIVED,L2_RQSTS:L2_PF_MISS\n"
806 "PRESET,PAPI_STL_ICY,NOT_DERIVED,IDQ:EMPTY\n"
807 "PRESET,PAPI_CA_ITV,NOT_DERIVED,OFFCORE_RESPONSE_0:SNP_FWD\n"
808 "CPU,hsw\n"
809 "CPU,hsw_ep\n"
810 "PRESET,PAPI_CA_INV,NOT_DERIVED,OFFCORE_RESPONSE_0:SNP_HITM\n"
811 "CPU,bdw\n"
812 "CPU,bdw_ep\n"
813 "PRESET,PAPI_CA_INV,NOT_DERIVED,OFFCORE_RESPONSE_0:HITM\n"
814 "# PAPI_DP_OPS = FP_ARITH:SCALAR_DOUBLE + 2*FP_ARITH:128B_PACKED_DOUBLE + 4*256B_PACKED_DOUBLE\n"
815 "PRESET,PAPI_DP_OPS,DERIVED_POSTFIX,N0|N1|2|*|+|N2|4|*|+|,FP_ARITH:SCALAR_DOUBLE,FP_ARITH:128B_PACKED_DOUBLE,FP_ARITH:256B_PACKED_DOUBLE\n"
816 "# PAPI_SP_OPS = FP_ARITH:SCALAR_SINGLE + 4*FP_ARITH:128B_PACKED_SINGLE + 8*256B_PACKED_SINGLE\n"
817 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|N1|4|*|+|N2|8|*|+|,FP_ARITH:SCALAR_SINGLE,FP_ARITH:128B_PACKED_SINGLE,FP_ARITH:256B_PACKED_SINGLE\n"
818 "PRESET,PAPI_VEC_DP,DERIVED_POSTFIX,N0|N1|N2|+|+|,FP_ARITH:SCALAR_DOUBLE,FP_ARITH:128B_PACKED_DOUBLE,FP_ARITH:256B_PACKED_DOUBLE\n"
819 "PRESET,PAPI_VEC_SP,DERIVED_POSTFIX,N0|N1|N2|+|+|,FP_ARITH:SCALAR_SINGLE,FP_ARITH:128B_PACKED_SINGLE,FP_ARITH:256B_PACKED_SINGLE\n"
820 "CPU,skl\n"
821 "CPU,skx\n"
822 "CPU,clx\n"
823 "# PAPI_DP_OPS = FP_ARITH:SCALAR_DOUBLE + 2*FP_ARITH:128B_PACKED_DOUBLE + 4*256B_PACKED_DOUBLE + 8*512B_PACKED_DOUBLE\n"
824 "PRESET,PAPI_DP_OPS,DERIVED_POSTFIX,N0|N1|2|*|+|N2|4|*|+|N3|8|*|+|,FP_ARITH:SCALAR_DOUBLE,FP_ARITH:128B_PACKED_DOUBLE,FP_ARITH:256B_PACKED_DOUBLE,FP_ARITH:512B_PACKED_DOUBLE\n"
825 "# PAPI_SP_OPS = FP_ARITH:SCALAR_SINGLE + 4*FP_ARITH:128B_PACKED_SINGLE + 8*256B_PACKED_SINGLE + 16*512B_PACKED_SINGLE\n"
826 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|N1|4|*|+|N2|8|*|+|N3|16|*|+|,FP_ARITH:SCALAR_SINGLE,FP_ARITH:128B_PACKED_SINGLE,FP_ARITH:256B_PACKED_SINGLE,FP_ARITH:512B_PACKED_SINGLE\n"
827 "PRESET,PAPI_VEC_DP,DERIVED_POSTFIX,N0|N1|N2|N3|+|+|+|,FP_ARITH:SCALAR_DOUBLE,FP_ARITH:128B_PACKED_DOUBLE,FP_ARITH:256B_PACKED_DOUBLE,FP_ARITH:512B_PACKED_DOUBLE\n"
828 "PRESET,PAPI_VEC_SP,DERIVED_POSTFIX,N0|N1|N2|N3|+|+|+|,FP_ARITH:SCALAR_SINGLE,FP_ARITH:128B_PACKED_SINGLE,FP_ARITH:256B_PACKED_SINGLE,FP_ARITH:512B_PACKED_SINGLE\n"
829 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_RQSTS:ALL_DEMAND_DATA_RD\n"
830 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_RQSTS:ALL_RFO\n"
831 "PRESET,PAPI_L2_DCW,DERIVED_ADD,L2_RQSTS:DEMAND_RFO_HIT,L2_RQSTS:RFO_HIT\n"
832 "PRESET,PAPI_L2_TCW,DERIVED_ADD,L2_RQSTS:DEMAND_RFO_HIT,L2_RQSTS:RFO_HIT\n"
833 "PRESET,PAPI_PRF_DM,NOT_DERIVED,L2_RQSTS:PF_MISS\n"
834 "PRESET,PAPI_STL_ICY,NOT_DERIVED,IDQ_UOPS_NOT_DELIVERED:CYCLES_0_UOPS_DELIV_CORE\n"
835 "PRESET,PAPI_CA_ITV,NOT_DERIVED,OFFCORE_RESPONSE_0:SNP_HIT_WITH_FWD\n"
836 "# End of hsw,bdw,skl,clx list\n"
837 "#\n"
838 "#\n"
839 "# Intel MIC / Xeon-Phi / Knights Landing\n"
840 "# Intel Knights Mill\n"
841 "#\n"
842 "CPU,knl\n"
843 "CPU,knm\n"
844 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_RETIRED\n"
845 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
846 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
847 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE:MISSES\n"
848 "PRESET,PAPI_L1_ICA,NOT_DERIVED,ICACHE:ACCESSES\n"
849 "PRESET,PAPI_L1_ICH,NOT_DERIVED,ICACHE:HIT\n"
850 "#\n"
851 "PRESET,PAPI_L1_DCA,DERIVED_ADD,MEM_UOPS_RETIRED:ANY_LD,MEM_UOPS_RETIRED:ANY_ST\n"
852 "PRESET,PAPI_L1_DCM,NOT_DERIVED,MEM_UOPS_RETIRED:LD_DCU_MISS\n"
853 "PRESET,PAPI_L1_TCM,DERIVED_ADD,MEM_UOPS_RETIRED:LD_DCU_MISS,ICACHE:MISSES\n"
854 "PRESET,PAPI_L1_LDM,NOT_DERIVED,MEM_UOPS_RETIRED:LD_DCU_MISS\n"
855 "#\n"
856 "PRESET,PAPI_L2_TCA,NOT_DERIVED,LLC_REFERENCES\n"
857 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LLC_MISSES\n"
858 "PRESET,PAPI_L2_TCH,DERIVED_SUB,LLC_REFERENCES,LLC_MISSES\n"
859 "PRESET,PAPI_L2_LDM,NOT_DERIVED,MEM_UOPS_RETIRED:LD_L2_MISS\n"
860 "PRESET,PAPI_LD_INS,NOT_DERIVED,MEM_UOPS_RETIRED:ANY_LD\n"
861 "PRESET,PAPI_SR_INS,NOT_DERIVED,MEM_UOPS_RETIRED:ANY_ST\n"
862 "PRESET,PAPI_LST_INS,DERIVED_ADD,MEM_UOPS_RETIRED:ANY_LD,MEM_UOPS_RETIRED:ANY_ST\n"
863 "#\n"
864 "PRESET,PAPI_TLB_DM,NOT_DERIVED,MEM_UOPS_RETIRED:LD_UTLB_MISS\n"
865 "#\n"
866 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_INSTRUCTIONS_RETIRED\n"
867 "PRESET,PAPI_BR_MSP,NOT_DERIVED,MISPREDICTED_BRANCH_RETIRED\n"
868 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED:JCC\n"
869 "PRESET,PAPI_BR_UCN,DERIVED_SUB,BRANCH_INSTRUCTIONS_RETIRED,BR_INST_RETIRED:JCC\n"
870 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_INST_RETIRED:TAKEN_JCC\n"
871 "PRESET,PAPI_BR_NTK,DERIVED_SUB,BR_INST_RETIRED:JCC,BR_INST_RETIRED:TAKEN_JCC\n"
872 "#\n"
873 "PRESET,PAPI_RES_STL,NOT_DERIVED,RS_FULL_STALL:ANY\n"
874 "PRESET,PAPI_STL_ICY,NOT_DERIVED,NO_ALLOC_CYCLES:ANY\n"
875 "#\n"
876 "# End of knl,knm list\n"
877 "CPU,Intel Core2\n"
878 "CPU,Intel Core\n"
879 "CPU,core\n"
880 "#\n"
881 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
882 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
883 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_RETIRED\n"
884 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_MISSES\n"
885 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I_READS\n"
886 "PRESET,PAPI_L1_ICH,DERIVED_SUB,L1I_READS,L1I_MISSES\n"
887 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_REPL\n"
888 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_ALL_REF\n"
889 "PRESET,PAPI_L1_DCH,DERIVED_SUB,L1D_ALL_REF,L1D_REPL\n"
890 "PRESET,PAPI_L1_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
891 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_LD:SELF:ANY:MESI\n"
892 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_ST:SELF:MESI\n"
893 "PRESET,PAPI_L1_TCA,DERIVED_ADD,L1D_ALL_REF,L1I_READS\n"
894 "PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_LINES_IN:SELF:ANY,BUS_TRANS_IFETCH:SELF\n"
895 "PRESET,PAPI_L2_ICM,NOT_DERIVED,BUS_TRANS_IFETCH:SELF\n"
896 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_LINES_IN:SELF:ANY\n"
897 "PRESET,PAPI_L2_LDM,DERIVED_SUB,L2_LINES_IN:SELF:ANY,L2_M_LINES_IN:SELF\n"
898 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_M_LINES_IN:SELF\n"
899 "PRESET,PAPI_L2_DCA,DERIVED_ADD,L2_LD:SELF:ANY:MESI,L2_ST:SELF:MESI\n"
900 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_LD:SELF:ANY:MESI\n"
901 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
902 "PRESET,PAPI_L2_ICH,DERIVED_SUB,L2_IFETCH:SELF:MESI,BUS_TRANS_IFETCH:SELF\n"
903 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_IFETCH:SELF:MESI\n"
904 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_RQSTS:SELF:ANY:MESI,L2_LINES_IN:SELF:ANY\n"
905 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:SELF:ANY:MESI\n"
906 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_LD:SELF:ANY:MESI,L2_IFETCH:SELF:MESI\n"
907 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_ST:SELF:MESI\n"
908 "#\n"
909 "PRESET,PAPI_LD_INS,NOT_DERIVED,INST_RETIRED:LOADS\n"
910 "PRESET,PAPI_SR_INS,NOT_DERIVED,INST_RETIRED:STORES\n"
911 "#\n"
912 "PRESET,PAPI_CA_SHR,NOT_DERIVED,L2_RQSTS:SELF:ANY:S_STATE\n"
913 "PRESET,PAPI_CA_CLN,NOT_DERIVED,BUS_TRANS_RFO:SELF\n"
914 "PRESET,PAPI_CA_ITV,NOT_DERIVED,BUS_TRANS_INVAL:SELF\n"
915 "#\n"
916 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB:MISSES\n"
917 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISSES:ANY\n"
918 "#\n"
919 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_INST_RETIRED:TAKEN\n"
920 "PRESET,PAPI_BR_NTK,NOT_DERIVED,BR_INST_RETIRED:PRED_NOT_TAKEN:MISPRED_NOT_TAKEN\n"
921 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_INST_EXEC\n"
922 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISSP_EXEC\n"
923 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_CND_EXEC\n"
924 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_CND_EXEC,BR_CND_MISSP_EXEC\n"
925 "#\n"
926 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,MACRO_INSTS:DECODED\n"
927 "PRESET,PAPI_HW_INT,NOT_DERIVED,HW_INT_RCV\n"
928 "PRESET,PAPI_RES_STL,NOT_DERIVED,RESOURCE_STALLS:ANY\n"
929 "#\n"
930 "PRESET,PAPI_FP_INS,NOT_DERIVED,FP_COMP_OPS_EXE\n"
931 "# This is an alternate definition of OPS that produces no error with calibrate\n"
932 "# the previous definition was identical to FP_INS\n"
933 "# PRESET,PAPI_FP_OPS,NOT_DERIVED,X87_OPS_RETIRED:ANY\n"
934 "# PRESET,PAPI_FP_OPS,DERIVED_ADD, FP_COMP_OPS_EXE, SIMD_COMP_INST_RETIRED:SCALAR_DOUBLE:PACKED_DOUBLE:SCALAR_SINGLE:PACKED_SINGLE\n"
935 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_COMP_OPS_EXE\n"
936 "# PAPI_SP_OPS = FP_COMP_OPS_EXE + 3 * SIMD_COMP_INST_RETIRED:PACKED_SINGLE\n"
937 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|N1|3|*|+|,FP_COMP_OPS_EXE,SIMD_COMP_INST_RETIRED:PACKED_SINGLE\n"
938 "PRESET,PAPI_DP_OPS,DERIVED_ADD,FP_COMP_OPS_EXE,SIMD_COMP_INST_RETIRED:PACKED_DOUBLE\n"
939 "PRESET,PAPI_VEC_SP,NOT_DERIVED,SIMD_COMP_INST_RETIRED:PACKED_SINGLE\n"
940 "PRESET,PAPI_VEC_DP,NOT_DERIVED,SIMD_COMP_INST_RETIRED:PACKED_DOUBLE\n"
941 "#\n"
942 "PRESET,PAPI_FML_INS,NOT_DERIVED,MUL\n"
943 "PRESET,PAPI_FDV_INS,NOT_DERIVED,DIV\n"
944 "PRESET,PAPI_VEC_INS,NOT_DERIVED,SIMD_INST_RETIRED:VECTOR\n"
945 "#\n"
946 "CPU,Intel Core Duo/Solo\n"
947 "CPU,coreduo\n"
948 "#\n"
949 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_RETIRED\n"
950 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,UNHALTED_CORE_CYCLES\n"
951 "PRESET,PAPI_REF_CYC,NOT_DERIVED,UNHALTED_REFERENCE_CYCLES\n"
952 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_INSTRUCTIONS_RETIRED\n"
953 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_TAKEN_RET\n"
954 "PRESET,PAPI_BR_MSP,NOT_DERIVED,MISPREDICTED_BRANCH_RETIRED\n"
955 "PRESET,PAPI_L2_TCM,NOT_DERIVED,LAST_LEVEL_CACHE_MISSES\n"
956 "PRESET,PAPI_L2_TCA,NOT_DERIVED,LAST_LEVEL_CACHE_REFERENCES\n"
957 "PRESET,PAPI_FP_INS,NOT_DERIVED,FP_COMP_INSTR_RET\n"
958 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_COMP_INSTR_RET\n"
959 "#\n"
960 "PRESET,PAPI_L1_DCM,NOT_DERIVED, DCACHE_REPL\n"
961 "PRESET,PAPI_L1_ICM,NOT_DERIVED, L2_IFETCH:SELF:MESI\n"
962 "PRESET,PAPI_L2_DCM,DERIVED_SUB, L2_LINES_IN:SELF:ANY, BUS_TRANS_IFETCH:SELF\n"
963 "PRESET,PAPI_L2_ICM,NOT_DERIVED, BUS_TRANS_IFETCH:SELF\n"
964 "PRESET,PAPI_L1_TCM,NOT_DERIVED, L2_RQSTS:SELF:MESI\n"
965 "#PRESET,PAPI_L2_TCM,NOT_DERIVED, L2_LINES_IN:SELF:ANY\n"
966 "PRESET,PAPI_CA_SHR,NOT_DERIVED, L2_RQSTS:SELF:ANY:S_STATE\n"
967 "PRESET,PAPI_CA_CLN,NOT_DERIVED, BUS_TRANS_RFO:SELF\n"
968 "PRESET,PAPI_CA_ITV,NOT_DERIVED, BUS_TRANS_INVAL:SELF\n"
969 "PRESET,PAPI_TLB_IM,NOT_DERIVED, ITLB_MISSES\n"
970 "PRESET,PAPI_TLB_DM,NOT_DERIVED, DTLB_MISS\n"
971 "PRESET,PAPI_L1_LDM,NOT_DERIVED, L2_LD:SELF:MESI\n"
972 "PRESET,PAPI_L1_STM,NOT_DERIVED, L2_ST:SELF:MESI\n"
973 "PRESET,PAPI_L2_LDM,DERIVED_SUB, L2_LINES_IN:SELF:ANY, L2_M_LINES_IN:SELF\n"
974 "PRESET,PAPI_L2_STM,NOT_DERIVED, L2_M_LINES_IN:SELF\n"
975 "PRESET,PAPI_BTAC_M,NOT_DERIVED, PREF_RQSTS_DN\n"
976 "PRESET,PAPI_HW_INT,NOT_DERIVED, HW_INT_RX\n"
977 "PRESET,PAPI_BR_CN,NOT_DERIVED, BR_CND_EXEC\n"
978 "PRESET,PAPI_BR_TKN,NOT_DERIVED, BR_TAKEN_RET\n"
979 "PRESET,PAPI_BR_NTK,DERIVED_SUB, BR_INSTR_RET,BR_TAKEN_RET\n"
980 "PRESET,PAPI_BR_MSP,NOT_DERIVED, BR_MISSP_EXEC\n"
981 "PRESET,PAPI_BR_PRC,DERIVED_SUB, BR_INSTR_RET,BR_MISPRED_RET\n"
982 "PRESET,PAPI_TOT_IIS,NOT_DERIVED, INSTR_DECODED\n"
983 "PRESET,PAPI_RES_STL,NOT_DERIVED, RESOURCE_STALL\n"
984 "PRESET,PAPI_L1_DCH,DERIVED_SUB, DATA_MEM_REF, DCACHE_REPL\n"
985 "PRESET,PAPI_L1_DCA,NOT_DERIVED, DATA_MEM_REF\n"
986 "PRESET,PAPI_L2_DCA,DERIVED_ADD, L2_LD:SELF:MESI, L2_ST:SELF:MESI\n"
987 "PRESET,PAPI_L2_DCR,NOT_DERIVED, L2_LD:SELF:MESI\n"
988 "PRESET,PAPI_L2_DCW,NOT_DERIVED, L2_ST:SELF:MESI\n"
989 "PRESET,PAPI_L1_ICH,DERIVED_SUB, BUS_TRANS_IFETCH:SELF, L2_IFETCH:SELF:MESI\n"
990 "PRESET,PAPI_L2_ICH,DERIVED_SUB, L2_IFETCH:SELF:MESI, BUS_TRANS_IFETCH:SELF\n"
991 "PRESET,PAPI_L1_ICA,NOT_DERIVED, BUS_TRANS_IFETCH:SELF\n"
992 "PRESET,PAPI_L2_ICA,NOT_DERIVED, L2_IFETCH:SELF:MESI\n"
993 "PRESET,PAPI_L1_ICR,NOT_DERIVED, BUS_TRANS_IFETCH:SELF\n"
994 "PRESET,PAPI_L2_ICR,NOT_DERIVED, L2_IFETCH:SELF:MESI\n"
995 "PRESET,PAPI_L2_TCH,DERIVED_SUB, L2_RQSTS:SELF:ANY:MESI, L2_LINES_IN:SELF:ANY\n"
996 "PRESET,PAPI_L1_TCA,DERIVED_ADD, DATA_MEM_REF, BUS_TRANS_IFETCH:SELF\n"
997 "PRESET,PAPI_L2_TCA,NOT_DERIVED, L2_RQSTS:SELF:ANY:MESI\n"
998 "PRESET,PAPI_L2_TCR,DERIVED_ADD, L2_LD:SELF:MESI, L2_IFETCH:SELF:MESI\n"
999 "PRESET,PAPI_L2_TCW,NOT_DERIVED, L2_ST:SELF:MESI\n"
1000 "PRESET,PAPI_FML_INS,NOT_DERIVED, MUL\n"
1001 "PRESET,PAPI_FDV_INS,NOT_DERIVED, DIV\n"
1002 "#\n"
1003 "CPU,Intel PentiumIII\n"
1004 "CPU,Intel P6 Processor Family\n"
1005 "CPU,p6\n"
1006 "#\n"
1007 "PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_LINES_IN,BUS_TRAN_IFETCH:SELF\n"
1008 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_LINES_IN\n"
1009 "PRESET,PAPI_L2_LDM,DERIVED_SUB,L2_LINES_IN,L2_M_LINES_INM\n"
1010 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_RQSTS:M:E:S:I,L2_LINES_IN\n"
1011 "#\n"
1012 "CPU,Intel PentiumM\n"
1013 "CPU,Intel Pentium M\n"
1014 "CPU,pm\n"
1015 "#\n"
1016 "PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_LINES_IN:ONLY_HW_PREFETCH:NON_HW_PREFETCH,BUS_TRAN_IFETCH:SELF\n"
1017 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_LINES_IN:ONLY_HW_PREFETCH:NON_HW_PREFETCH\n"
1018 "PRESET,PAPI_L2_LDM,DERIVED_SUB,L2_LINES_IN:ONLY_HW_PREFETCH:NON_HW_PREFETCH,L2_M_LINES_INM\n"
1019 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_RQSTS:M:E:S:I,L2_LINES_IN:ONLY_HW_PREFETCH:NON_HW_PREFETCH\n"
1020 "#\n"
1021 "CPU,Intel P6\n"
1022 "CPU,Intel PentiumIII\n"
1023 "CPU,Intel PentiumM\n"
1024 "CPU,Intel P6 Processor Family\n"
1025 "CPU,Intel Pentium Pro\n"
1026 "CPU,Intel Pentium II\n"
1027 "CPU,Intel Pentium M\n"
1028 "CPU,p6\n"
1029 "CPU,ppro\n"
1030 "CPU,pii\n"
1031 "CPU,pm\n"
1032 "#\n"
1033 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1034 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED\n"
1035 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DCU_LINES_IN\n"
1036 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L2_IFETCH:M:E:S:I\n"
1037 "PRESET,PAPI_L1_TCM,NOT_DERIVED,L2_RQSTS:M:E:S:I\n"
1038 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_LD:M:E:S:I\n"
1039 "PRESET,PAPI_L1_STM,NOT_DERIVED,L2_ST:M:E:S:I\n"
1040 "PRESET,PAPI_L1_DCH,DERIVED_SUB,DATA_MEM_REFS,DCU_LINES_IN\n"
1041 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_MEM_REFS\n"
1042 "PRESET,PAPI_L1_ICH,DERIVED_SUB,IFU_IFETCH,L2_IFETCH:M:E:S:I\n"
1043 "PRESET,PAPI_L1_ICA,NOT_DERIVED,IFU_IFETCH\n"
1044 "PRESET,PAPI_L1_ICR,NOT_DERIVED,IFU_IFETCH\n"
1045 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DATA_MEM_REFS,IFU_IFETCH\n"
1046 "#\n"
1047 "PRESET,PAPI_L2_ICM,NOT_DERIVED,BUS_TRAN_IFETCH:SELF\n"
1048 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_M_LINES_INM\n"
1049 "PRESET,PAPI_L2_DCA,DERIVED_ADD,L2_LD:M:E:S:I,L2_ST:M:E:S:I\n"
1050 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_LD:M:E:S:I\n"
1051 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_ST:M:E:S:I\n"
1052 "PRESET,PAPI_L2_ICH,DERIVED_SUB,L2_IFETCH:M:E:S:I,BUS_TRAN_IFETCH:SELF\n"
1053 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_IFETCH:M:E:S:I\n"
1054 "PRESET,PAPI_L2_ICR,NOT_DERIVED,L2_IFETCH:M:E:S:I\n"
1055 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:M:E:S:I\n"
1056 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_LD:M:E:S:I,L2_IFETCH:M:E:S:I\n"
1057 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_ST:M:E:S:I\n"
1058 "#\n"
1059 "PRESET,PAPI_CA_SHR,NOT_DERIVED,L2_RQSTS:S\n"
1060 "PRESET,PAPI_CA_CLN,NOT_DERIVED,BUS_TRANS_RFO:SELF\n"
1061 "PRESET,PAPI_CA_ITV,NOT_DERIVED,BUS_TRAN_INVAL:SELF\n"
1062 "#\n"
1063 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1064 "PRESET,PAPI_HW_INT,NOT_DERIVED,HW_INT_RX\n"
1065 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,INST_DECODED\n"
1066 "PRESET,PAPI_RES_STL,NOT_DERIVED,RESOURCE_STALLS\n"
1067 "#\n"
1068 "PRESET,PAPI_BTAC_M,NOT_DERIVED,BTB_MISSES\n"
1069 "PRESET,PAPI_BR_CN,NOT_DERIVED,BR_INST_RETIRED\n"
1070 "PRESET,PAPI_BR_TKN,NOT_DERIVED,BR_TAKEN_RETIRED\n"
1071 "PRESET,PAPI_BR_NTK,DERIVED_SUB,BR_INST_RETIRED,BR_TAKEN_RETIRED\n"
1072 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISS_PRED_RETIRED\n"
1073 "PRESET,PAPI_BR_PRC,DERIVED_SUB,BR_INST_RETIRED,BR_MISS_PRED_RETIRED\n"
1074 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_INST_RETIRED\n"
1075 "#\n"
1076 "PRESET,PAPI_FP_INS,NOT_DERIVED,FLOPS\n"
1077 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FLOPS\n"
1078 "PRESET,PAPI_FML_INS,NOT_DERIVED,MUL\n"
1079 "PRESET,PAPI_FDV_INS,NOT_DERIVED,DIV\n"
1080 "#\n"
1081 "# This is an example of multiple processor names matching the same table\n"
1082 "CPU,Intel Pentium4\n"
1083 "CPU,Intel Pentium4 L3\n"
1084 "CPU,Pentium4/Xeon/EM64T\n"
1085 "CPU,netburst\n"
1086 "CPU,netburst_p\n"
1087 "#\n"
1088 "# Note: the proper event is GLOBAL_POWER_EVENTS:RUNNING\n"
1089 "# but the kernel grabs that for the watchdog timer\n"
1090 "# and suggests '' is equivalent\n"
1091 "#PRESET,PAPI_TOT_CYC,NOT_DERIVED,GLOBAL_POWER_EVENTS:RUNNING\n"
1092 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,execution_event:nbogus0:nbogus1:nbogus2:nbogus3:bogus0:bogus1:bogus2:bogus3:cmpl:thr=15\n"
1093 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_RETIRED:NBOGUSNTAG\n"
1094 "PRESET,PAPI_RES_STL, NOT_DERIVED, resource_stall:SBFULL\n"
1095 "PRESET,PAPI_BR_INS, NOT_DERIVED, branch_retired:MMNP:MMNM:MMTP:MMTM\n"
1096 "PRESET,PAPI_BR_TKN, NOT_DERIVED, branch_retired:MMTP:MMTM\n"
1097 "PRESET,PAPI_BR_NTK, NOT_DERIVED, branch_retired:MMNP:MMNM\n"
1098 "PRESET,PAPI_BR_MSP, NOT_DERIVED, branch_retired:MMNM:MMTM\n"
1099 "PRESET,PAPI_BR_PRC, NOT_DERIVED, branch_retired:MMNP:MMTP\n"
1100 "PRESET,PAPI_TLB_DM, NOT_DERIVED, page_walk_type:DTMISS\n"
1101 "PRESET,PAPI_TLB_IM, NOT_DERIVED, page_walk_type:ITMISS\n"
1102 "PRESET,PAPI_TLB_TL, NOT_DERIVED, page_walk_type:DTMISS:ITMISS\n"
1103 "PRESET,PAPI_LD_INS, DERIVED_CMPD, front_end_event:NBOGUS, uops_type:TAGLOADS\n"
1104 "PRESET,PAPI_SR_INS, DERIVED_CMPD, front_end_event:NBOGUS, uops_type:TAGSTORES\n"
1105 "PRESET,PAPI_LST_INS, DERIVED_CMPD, front_end_event:NBOGUS, uops_type:TAGLOADS:TAGSTORES\n"
1106 "PRESET,PAPI_FP_INS, DERIVED_CMPD, execution_event:NBOGUS0, x87_FP_uop:ALL:TAG0,NOTE,'PAPI_FP_INS counts only retired x87 uops tagged with 0. If you add other native events tagged with 0, their counts will be included in PAPI_FP_INS'\n"
1107 "PRESET,PAPI_TOT_IIS, NOT_DERIVED, instr_retired:NBOGUSNTAG:NBOGUSTAG:BOGUSNTAG:BOGUSTAG, NOTE, 'Only on model 2 and above'\n"
1108 "PRESET,PAPI_L1_ICM, NOT_DERIVED, BPU_fetch_request:TCMISS\n"
1109 "PRESET,PAPI_L1_ICA, NOT_DERIVED, uop_queue_writes:FROM_TC_BUILD:FROM_TC_DELIVER\n"
1110 "PRESET,PAPI_L1_LDM, NOT_DERIVED, replay_event:NBOGUS:L1_LD_MISS\n"
1111 "PRESET,PAPI_L2_LDM, NOT_DERIVED, replay_event:NBOGUS:L2_LD_MISS\n"
1112 "PRESET,PAPI_L2_TCH, NOT_DERIVED, BSQ_cache_reference:RD_2ndL_HITS:RD_2ndL_HITE:RD_2ndL_HITM\n"
1113 "PRESET,PAPI_L2_TCM, NOT_DERIVED, BSQ_cache_reference:RD_2ndL_MISS\n"
1114 "PRESET,PAPI_L2_TCA, NOT_DERIVED, BSQ_cache_reference:RD_2ndL_MISS:RD_2ndL_HITS:RD_2ndL_HITE:RD_2ndL_HITM\n"
1115 "#\n"
1116 "CPU,Intel Pentium4 L3\n"
1117 "PRESET,PAPI_L3_TCH, NOT_DERIVED, BSQ_cache_reference:RD_3rdL_HITS:RD_3rdL_HITE:RD_3rdL_HITM\n"
1118 "PRESET,PAPI_L3_TCM, NOT_DERIVED, BSQ_cache_reference:RD_3rdL_MISS\n"
1119 "PRESET,PAPI_L3_TCA, NOT_DERIVED, BSQ_cache_reference:RD_3rdL_MISS:RD_3rdL_HITS:RD_3rdL_HITE:RD_3rdL_HITM\n"
1120 "#\n"
1121 "CPU,Intel Pentium4 FPU X87\n"
1122 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, x87_FP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired x87 uops tagged with 1.'\n"
1123 "#\n"
1124 "CPU,Intel Pentium4 FPU SSE_SP\n"
1125 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, scalar_SP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired scalar_SP SSE uops tagged with 1.'\n"
1126 "#\n"
1127 "CPU,Intel Pentium4 FPU SSE_DP\n"
1128 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, scalar_DP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired scalar_DP SSE uops tagged with 1.'\n"
1129 "#\n"
1130 "CPU,Intel Pentium4 FPU X87 SSE_SP\n"
1131 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, scalar_SP_uop:ALL:TAG1, x87_FP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired x87 and scalar_SP SSE uops tagged with 1.'\n"
1132 "#\n"
1133 "CPU,Intel Pentium4 FPU X87 SSE_DP\n"
1134 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, scalar_DP_uop:ALL:TAG1, x87_FP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired x87 and scalar_DP SSE uops tagged with 1.'\n"
1135 "#\n"
1136 "CPU,Intel Pentium4 FPU SSE_SP SSE_DP\n"
1137 "PRESET,PAPI_FP_OPS, DERIVED_CMPD, execution_event:NBOGUS1, scalar_SP_uop:ALL:TAG1, scalar_DP_uop:ALL:TAG1,NOTE,'PAPI_FP_OPS counts retired scalar_SP and scalar_DP SSE uops tagged with 1.'\n"
1138 "#\n"
1139 "CPU,Intel Pentium4 VEC MMX\n"
1140 "PRESET,PAPI_VEC_INS, DERIVED_CMPD, execution_event:NBOGUS2, 64bit_MMX_uop:ALL:TAG2, 128bit_MMX_uop:ALL:TAG2,NOTE,'PAPI_VEC_INS counts retired 64bit and 128bit MMX uops tagged with 2.'\n"
1141 "#\n"
1142 "CPU,Intel Pentium4 VEC SSE\n"
1143 "PRESET,PAPI_VEC_INS, DERIVED_CMPD, execution_event:NBOGUS2, packed_SP_uop:ALL:TAG2, packed_DP_uop:ALL:TAG2,NOTE,'PAPI_VEC_INS counts retired packed single and double precision SSE uops tagged with 2.'\n"
1144 "#\n"
1145 "CPU,IA-64\n"
1146 "#\n"
1147 "CPU,dual-core Itanium 2\n"
1148 "#\n"
1149 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_OPS_RETIRED\n"
1150 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DISP_STALLED\n"
1151 "PRESET,PAPI_STL_CCY,NOT_DERIVED,BACK_END_BUBBLE_ALL\n"
1152 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,INST_DISPERSED\n"
1153 "PRESET,PAPI_RES_STL,NOT_DERIVED,BE_EXE_BUBBLE_ALL\n"
1154 "PRESET,PAPI_FP_STAL,NOT_DERIVED,BE_EXE_BUBBLE_FRALL\n"
1155 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L2I_READS_ALL_DMND\n"
1156 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_READ_MISSES_ALL\n"
1157 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2I_READS_MISS_ALL\n"
1158 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L2I_READS_MISS_ALL\n"
1159 "PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_MISSES\n"
1160 "PRESET,PAPI_L3_ICM,NOT_DERIVED,L3_READS_INST_FETCH_MISS:M:E:S:I\n"
1161 "PRESET,PAPI_L3_LDM,NOT_DERIVED,L3_READS_ALL_MISS:M:E:S:I\n"
1162 "PRESET,PAPI_L3_STM,NOT_DERIVED,L3_WRITES_DATA_WRITE_MISS:M:E:S:I\n"
1163 "PRESET,PAPI_L1_LDM,NOT_DERIVED,L1D_READ_MISSES_ALL\n"
1164 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L3_READS_ALL_ALL:M:E:S:I\n"
1165 "PRESET,PAPI_L2_STM,NOT_DERIVED,L3_WRITES_ALL_ALL:M:E:S:I\n"
1166 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_READS_SET1\n"
1167 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L2D_REFERENCES_ALL\n"
1168 "PRESET,PAPI_L3_DCA,NOT_DERIVED,L3_REFERENCES\n"
1169 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_READS_SET1\n"
1170 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2D_REFERENCES_READS\n"
1171 "PRESET,PAPI_L3_DCR,NOT_DERIVED,L3_READS_DATA_READ_ALL:M:E:S:I\n"
1172 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2D_REFERENCES_WRITES\n"
1173 "PRESET,PAPI_L3_DCW,NOT_DERIVED,L3_WRITES_DATA_WRITE_ALL:M:E:S:I\n"
1174 "PRESET,PAPI_L3_ICH,NOT_DERIVED,L3_READS_DINST_FETCH_HIT:M:E:S:I\n"
1175 "PRESET,PAPI_L3_ICR,NOT_DERIVED,L3_READS_INST_FETCH_ALL:M:E:S:I\n"
1176 "PRESET,PAPI_L3_TCA,NOT_DERIVED,L3_REFERENCES\n"
1177 "PRESET,PAPI_L3_TCR,NOT_DERIVED,L3_READS_ALL_ALL:M:E:S:I\n"
1178 "PRESET,PAPI_L3_TCW,NOT_DERIVED,L3_WRITES_ALL_ALL:M:E:S:I\n"
1179 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L2DTLB_MISSES\n"
1180 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISSES_FETCH_L2ITLB\n"
1181 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_EVENT\n"
1182 "PRESET,PAPI_BR_PRC,NOT_DERIVED,BR_MISPRED_DETAIL_ALL_CORRECT_PRED\n"
1183 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_OP_CYCLES_ALL\n"
1184 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_OPS_RETIRED\n"
1185 "PRESET,PAPI_TOT_INS,NOT_DERIVED,IA64_INST_RETIRED\n"
1186 "PRESET,PAPI_LD_INS,NOT_DERIVED,LOADS_RETIRED\n"
1187 "PRESET,PAPI_SR_INS,NOT_DERIVED,STORES_RETIRED\n"
1188 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2I_DEMAND_READS\n"
1189 "PRESET,PAPI_L3_ICA,NOT_DERIVED,L3_READS_INST_FETCH_ALL:M:E:S:I\n"
1190 "PRESET,PAPI_L1_TCR,NOT_DERIVED,L2I_READS_ALL_ALL\n"
1191 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2D_REFERENCES_WRITES\n"
1192 "#\n"
1193 "CPU,itanium2\n"
1194 "#\n"
1195 "PRESET,PAPI_CA_SNP,NOT_DERIVED,BUS_SNOOPS_SELF\n"
1196 "PRESET,PAPI_CA_INV,DERIVED_ADD,BUS_MEM_READ_BRIL_SELF,BUS_MEM_READ_BIL_SELF\n"
1197 "PRESET,PAPI_TLB_TL,DERIVED_ADD,ITLB_MISSES_FETCH_L2ITLB,L2DTLB_MISSES\n"
1198 "PRESET,PAPI_STL_ICY,NOT_DERIVED,DISP_STALLED\n"
1199 "PRESET,PAPI_STL_CCY,NOT_DERIVED,BACK_END_BUBBLE_ALL\n"
1200 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,INST_DISPERSED\n"
1201 "PRESET,PAPI_RES_STL,NOT_DERIVED,BE_EXE_BUBBLE_ALL\n"
1202 "PRESET,PAPI_FP_STAL,NOT_DERIVED,BE_EXE_BUBBLE_FRALL\n"
1203 "PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_DATA_REFERENCES_L2_DATA_READS,L2_INST_DEMAND_READS,L2_INST_PREFETCHES\n"
1204 "PRESET,PAPI_L1_TCM,DERIVED_ADD,L2_INST_DEMAND_READS,L1D_READ_MISSES_ALL\n"
1205 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L2_INST_DEMAND_READS\n"
1206 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_READ_MISSES_ALL\n"
1207 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_MISSES\n"
1208 "PRESET,PAPI_L2_DCM, DERIVED_SUB,L2_MISSES,L3_READS_INST_FETCH_ALL\n"
1209 "PRESET,PAPI_L2_ICM,NOT_DERIVED,L3_READS_INST_FETCH_ALL\n"
1210 "PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_MISSES\n"
1211 "PRESET,PAPI_L3_ICM,NOT_DERIVED,L3_READS_INST_FETCH_MISS\n"
1212 "PRESET,PAPI_L3_DCM, DERIVED_ADD,L3_READS_DATA_READ_MISS,L3_WRITES_DATA_WRITE_MISS\n"
1213 "PRESET,PAPI_L3_LDM,NOT_DERIVED,L3_READS_ALL_MISS\n"
1214 "PRESET,PAPI_L3_STM,NOT_DERIVED,L3_WRITES_DATA_WRITE_MISS\n"
1215 "PRESET,PAPI_L1_LDM,DERIVED_ADD,L1D_READ_MISSES_ALL,L2_INST_DEMAND_READS\n"
1216 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L3_READS_ALL_ALL\n"
1217 "PRESET,PAPI_L2_STM,NOT_DERIVED,L3_WRITES_ALL_ALL\n"
1218 "PRESET,PAPI_L1_DCH,DERIVED_SUB,L1D_READS_SET1,L1D_READ_MISSES_ALL\n"
1219 "PRESET,PAPI_L2_DCH,DERIVED_SUB,L2_DATA_REFERENCES_L2_ALL,L2_MISSES\n"
1220 "PRESET,PAPI_L3_DCH,DERIVED_ADD,L3_READS_DATA_READ_HIT,L3_WRITES_DATA_WRITE_HIT\n"
1221 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_READS_SET1\n"
1222 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L2_DATA_REFERENCES_L2_ALL\n"
1223 "PRESET,PAPI_L3_DCA,DERIVED_ADD,L3_READS_DATA_READ_ALL,L3_WRITES_DATA_WRITE_ALL\n"
1224 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_READS_SET1\n"
1225 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2_DATA_REFERENCES_L2_DATA_READS\n"
1226 "PRESET,PAPI_L3_DCR,NOT_DERIVED,L3_READS_DATA_READ_ALL\n"
1227 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2_DATA_REFERENCES_L2_DATA_WRITES\n"
1228 "PRESET,PAPI_L3_DCW,NOT_DERIVED,L3_WRITES_DATA_WRITE_ALL\n"
1229 "PRESET,PAPI_L3_ICH,NOT_DERIVED,L3_READS_DINST_FETCH_HIT\n"
1230 "PRESET,PAPI_L1_ICR,DERIVED_ADD,L1I_PREFETCHES,L1I_READS\n"
1231 "PRESET,PAPI_L2_ICR,DERIVED_ADD,L2_INST_DEMAND_READS,L2_INST_PREFETCHES\n"
1232 "PRESET,PAPI_L3_ICR,NOT_DERIVED,L3_READS_INST_FETCH_ALL\n"
1233 "PRESET,PAPI_L1_ICA,DERIVED_ADD,L1I_PREFETCHES,L1I_READS\n"
1234 "PRESET,PAPI_L2_TCH,DERIVED_SUB,L2_REFERENCES,L2_MISSES\n"
1235 "PRESET,PAPI_L3_TCH,DERIVED_SUB,L3_REFERENCES,L3_MISSES\n"
1236 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_REFERENCES\n"
1237 "PRESET,PAPI_L3_TCA,NOT_DERIVED,L3_REFERENCES\n"
1238 "PRESET,PAPI_L3_TCR,NOT_DERIVED,L3_READS_ALL_ALL\n"
1239 "PRESET,PAPI_L3_TCW,NOT_DERIVED,L3_WRITES_ALL_ALL\n"
1240 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L2DTLB_MISSES\n"
1241 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISSES_FETCH_L2ITLB\n"
1242 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_EVENT\n"
1243 "PRESET,PAPI_BR_PRC,NOT_DERIVED,BR_MISPRED_DETAIL_ALL_CORRECT_PRED\n"
1244 "PRESET,PAPI_BR_MSP,DERIVED_ADD,BR_MISPRED_DETAIL_ALL_WRONG_PATH,BR_MISPRED_DETAIL_ALL_WRONG_TARGET\n"
1245 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1246 "PRESET,PAPI_FP_OPS,NOT_DERIVED,FP_OPS_RETIRED\n"
1247 "PRESET,PAPI_TOT_INS,DERIVED_ADD,IA64_INST_RETIRED,IA32_INST_RETIRED\n"
1248 "PRESET,PAPI_LD_INS,NOT_DERIVED,LOADS_RETIRED\n"
1249 "PRESET,PAPI_SR_INS,NOT_DERIVED,STORES_RETIRED\n"
1250 "PRESET,PAPI_L2_ICA,NOT_DERIVED,L2_INST_DEMAND_READS\n"
1251 "PRESET,PAPI_L3_ICA,NOT_DERIVED,L3_READS_INST_FETCH_ALL\n"
1252 "PRESET,PAPI_L1_TCR,DERIVED_ADD,L1D_READS_SET0,L1I_READS \n"
1253 "PRESET,PAPI_L1_TCA,DERIVED_ADD,L1D_READS_SET0,L1I_READS \n"
1254 "PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_DATA_REFERENCES_L2_DATA_WRITES\n"
1255 "#\n"
1256 "CPU,itanium\n"
1257 "#\n"
1258 "CPU,PPC970\n"
1259 "#\n"
1260 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1261 "PRESET,PAPI_L2_DCR,DERIVED_ADD,PM_DATA_FROM_L2,PM_DATA_FROM_L25_MOD,PM_DATA_FROM_L25_SHR,PM_DATA_FROM_MEM\n"
1262 "PRESET,PAPI_L2_DCH,DERIVED_ADD,PM_DATA_FROM_L2,PM_DATA_FROM_L25_MOD,PM_DATA_FROM_L25_SHR\n"
1263 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1264 "PRESET,PAPI_L1_ICM,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD,PM_INST_FROM_MEM\n"
1265 "PRESET,PAPI_L2_ICA,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD,PM_INST_FROM_MEM\n"
1266 "PRESET,PAPI_L2_ICH,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD\n"
1267 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_MEM\n"
1268 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1269 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_REF_L1\n"
1270 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1271 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1272 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1273 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PM_ST_REF_L1\n"
1274 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_REF_L1\n"
1275 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FPU_FMA\n"
1276 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1277 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1278 "PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_FIN\n"
1279 "PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|-|,PM_FPU0_FIN,PM_FPU1_FIN,PM_FPU_FMA,PM_FPU_STF\n"
1280 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FPU_FIN\n"
1281 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_CYC\n"
1282 "PRESET,PAPI_FDV_INS,NOT_DERIVED,PM_FPU_FDIV\n"
1283 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,PM_FPU_FSQRT\n"
1284 "PRESET,PAPI_TLB_DM,NOT_DERIVED,PM_DTLB_MISS\n"
1285 "PRESET,PAPI_TLB_IM,NOT_DERIVED,PM_ITLB_MISS\n"
1286 "PRESET,PAPI_TLB_TL,DERIVED_ADD,PM_DTLB_MISS,PM_ITLB_MISS\n"
1287 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1288 "PRESET,PAPI_STL_ICY,NOT_DERIVED,PM_0INST_FETCH\n"
1289 "PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1\n"
1290 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_REF_L1\n"
1291 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_ST_REF_L1,PM_LD_REF_L1\n"
1292 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_ISSUED\n"
1293 "PRESET,PAPI_BR_MSP,DERIVED_ADD,PM_BR_MPRED_CR,PM_BR_MPRED_TA\n"
1294 "PRESET,PAPI_L1_DCH,DERIVED_POSTFIX,N0|N1|-|N2|+|N3|-|,PM_LD_REF_L1,PM_LD_MISS_L1,PM_ST_REF_L1,PM_ST_MISS_L1\n"
1295 "PRESET,PAPI_L3_DCM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1296 "PRESET,PAPI_L3_LDM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1297 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1298 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_MEM\n"
1299 "#\n"
1300 "CPU,PPC970MP\n"
1301 "#\n"
1302 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1303 "PRESET,PAPI_L2_DCR,DERIVED_ADD,PM_DATA_FROM_L2,PM_DATA_FROM_L25_MOD,PM_DATA_FROM_L25_SHR,PM_DATA_FROM_MEM\n"
1304 "PRESET,PAPI_L2_DCH,DERIVED_ADD,PM_DATA_FROM_L2,PM_DATA_FROM_L25_MOD,PM_DATA_FROM_L25_SHR PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1305 "#PRESET,PAPI_L1_ICM,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD,PM_INST_FROM_MEM\n"
1306 "#PRESET,PAPI_L2_ICA,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD,PM_INST_FROM_MEM\n"
1307 "#PRESET,PAPI_L2_ICH,DERIVED_ADD,PM_INST_FROM_L2,PM_INST_FROM_L25_SHR,PM_INST_FROM_L25_MOD PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_MEM\n"
1308 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1309 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_REF_L1\n"
1310 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1311 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1312 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1313 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PM_ST_REF_L1\n"
1314 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_REF_L1\n"
1315 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FPU_FMA\n"
1316 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1317 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1318 "PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_FIN\n"
1319 "PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|-|,PM_FPU0_FIN,PM_FPU1_FIN,PM_FPU_FMA,PM_FPU_STF \n"
1320 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FPU_FIN\n"
1321 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_CYC\n"
1322 "PRESET,PAPI_FDV_INS,NOT_DERIVED,PM_FPU_FDIV\n"
1323 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,PM_FPU_FSQRT\n"
1324 "PRESET,PAPI_TLB_DM,NOT_DERIVED,PM_DTLB_MISS\n"
1325 "PRESET,PAPI_TLB_IM,NOT_DERIVED,PM_ITLB_MISS\n"
1326 "PRESET,PAPI_TLB_TL,DERIVED_ADD,PM_DTLB_MISS,PM_ITLB_MISS\n"
1327 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1328 "PRESET,PAPI_STL_ICY,NOT_DERIVED,PM_0INST_FETCH\n"
1329 "PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1\n"
1330 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_REF_L1\n"
1331 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_ST_REF_L1,PM_LD_REF_L1\n"
1332 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_ISSUED\n"
1333 "PRESET,PAPI_BR_MSP,DERIVED_ADD,PM_BR_MPRED_CR,PM_BR_MPRED_TA\n"
1334 "PRESET,PAPI_L1_DCH,DERIVED_POSTFIX,N0|N1|-|N2|+|N3|-|,PM_LD_REF_L1,PM_LD_MISS_L1,PM_ST_REF_L1,PM_ST_MISS_L1\n"
1335 "PRESET,PAPI_L3_DCM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1336 "PRESET,PAPI_L3_LDM,NOT_DERIVED,PM_DATA_FROM_MEM\n"
1337 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1338 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_MEM\n"
1339 "#\n"
1340 "CPU,POWER5\n"
1341 "#\n"
1342 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1343 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_REF_L1\n"
1344 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1345 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1346 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PM_ST_REF_L1\n"
1347 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_REF_L1\n"
1348 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1349 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1350 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1351 "PRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1352 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1353 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1354 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1355 "PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1356 "PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1357 "PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1358 "PRESET,PAPI_L3_ICM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1359 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FPU_FMA\n"
1360 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1361 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1362 "PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_FIN\n"
1363 "PRESET,PAPI_FP_OPS,DERIVED_ADD,PM_FPU_1FLOP,PM_FPU_FMA,PM_FPU_FMA\n"
1364 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FPU_FIN\n"
1365 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1366 "PRESET,PAPI_FDV_INS,NOT_DERIVED,PM_FPU_FDIV\n"
1367 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,PM_FPU_FSQRT\n"
1368 "PRESET,PAPI_TLB_DM,NOT_DERIVED,PM_DTLB_MISS\n"
1369 "PRESET,PAPI_TLB_IM,NOT_DERIVED,PM_ITLB_MISS\n"
1370 "PRESET,PAPI_TLB_TL,DERIVED_ADD,PM_DTLB_MISS,PM_ITLB_MISS\n"
1371 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1372 "PRESET,PAPI_STL_ICY,NOT_DERIVED,PM_0INST_FETCH\n"
1373 "PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1\n"
1374 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_REF_L1\n"
1375 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_ST_REF_L1,PM_LD_REF_L1\n"
1376 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_ISSUED\n"
1377 "PRESET,PAPI_BR_MSP,DERIVED_ADD,PM_BR_MPRED_CR,PM_BR_MPRED_TA\n"
1378 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED_CR_TA\n"
1379 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1380 "#\n"
1381 "CPU,POWER5+\n"
1382 "#\n"
1383 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1384 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_REF_L1\n"
1385 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1386 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1387 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PM_ST_REF_L1\n"
1388 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_REF_L1\n"
1389 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1390 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1391 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1392 "PRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1393 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1394 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1395 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1396 "PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1397 "PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1398 "PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1399 "PRESET,PAPI_L3_ICM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1400 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FPU_FMA\n"
1401 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1402 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1403 "PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_FIN\n"
1404 "PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|2|*|+|N2|N3|+|4|*|+|,PM_FPU_1FLOP,PM_FPU_FMA,PM_FPU_FSQRT,PM_FPU_FDIV\n"
1405 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FPU_FIN\n"
1406 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1407 "PRESET,PAPI_FDV_INS,NOT_DERIVED,PM_FPU_FDIV\n"
1408 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,PM_FPU_FSQRT\n"
1409 "PRESET,PAPI_TLB_DM,NOT_DERIVED,PM_DTLB_MISS\n"
1410 "PRESET,PAPI_TLB_IM,NOT_DERIVED,PM_ITLB_MISS\n"
1411 "PRESET,PAPI_TLB_TL,DERIVED_ADD,PM_DTLB_MISS,PM_ITLB_MISS\n"
1412 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1413 "PRESET,PAPI_STL_ICY,NOT_DERIVED,PM_0INST_FETCH\n"
1414 "PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1\n"
1415 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_REF_L1\n"
1416 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_ST_REF_L1,PM_LD_REF_L1\n"
1417 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_ISSUED\n"
1418 "PRESET,PAPI_BR_MSP,DERIVED_ADD,PM_BR_MPRED_CR,PM_BR_MPRED_TA\n"
1419 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED_CR_TA\n"
1420 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1421 "#\n"
1422 "CPU,POWER6\n"
1423 "CPU,power6\n"
1424 "#\n"
1425 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1426 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_REF_L1\n"
1427 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1428 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1429 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PM_ST_REF_L1\n"
1430 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_REF_L1\n"
1431 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1432 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1433 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1434 "PRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1435 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1436 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1437 "PRESET,PAPI_L1_ICM,NOT_DERIVED,PM_L1_ICACHE_MISS\n"
1438 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1439 "PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1440 "PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1441 "PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1442 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_L3MISS\n"
1443 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FPU_FMA\n"
1444 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1445 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1446 "PRESET,PAPI_INT_INS,DERIVED_ADD,PM_FXU0_FIN,PM_FXU1_FIN\n"
1447 "# This definition comes from the (unreleased) IBM PM documentation\n"
1448 "PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|3|*|N1|N2|+|+|,PM_FPU_FSQRT_FDIV,PM_FPU_FLOP,PM_FPU_FMA\n"
1449 "# The following counts SQRT and DIV as one FP event instead of 4\n"
1450 "#PRESET,PAPI_FP_OPS,DERIVED_ADD,PM_FPU_FLOP,PM_FPU_FMA\n"
1451 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FPU_FIN\n"
1452 "# It appears PM_CYC is not widely available\n"
1453 "#PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_CYC\n"
1454 "# PM_RUN_CYC is in every group; but it doesn't overflow :(\n"
1455 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1456 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1457 "PRESET,PAPI_STL_ICY,NOT_DERIVED,PM_0INST_FETCH\n"
1458 "PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1\n"
1459 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_REF_L1\n"
1460 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_ST_REF_L1,PM_LD_REF_L1\n"
1461 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BRU_FIN\n"
1462 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PM_BR_MPRED\n"
1463 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED\n"
1464 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1465 "#\n"
1466 "CPU,POWER7\n"
1467 "CPU,power7\n"
1468 "#\n"
1469 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1470 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1471 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1472 "PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1\n"
1473 "PRESET,PAPI_L1_DCR,DERIVED_SUB,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1474 "PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|-|N2|+|N3|-,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1475 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1476 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS\n"
1477 "PRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS\n"
1478 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1479 "PRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1480 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1481 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1482 "PRESET,PAPI_L1_ICM,NOT_DERIVED,PM_L1_ICACHE_MISS\n"
1483 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_L2_INST_MISS\n"
1484 "PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1485 "PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1486 "PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1487 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_L3MISS\n"
1488 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_VSU_FMA\n"
1489 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1490 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1491 "PRESET,PAPI_INT_INS,DERIVED_ADD,PM_FXU0_FIN,PM_FXU1_FIN\n"
1492 "#\n"
1493 "# We'd like to do a 1FLOP + 2*2FLOP + 4*4FLOP + 8*8FLOP + 16*16FLOP, but\n"
1494 "# we run out of counters (we have 4, but need 5). So for now, just assume\n"
1495 "# that the vast majority of users won't be using the single precision\n"
1496 "# vector FDIV and FSQRT instructions that would tick PM_VSU0_16FLOP.\n"
1497 "#\n"
1498 "#PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|2|*|+|N2|4|*|+|N3|8|*|+|N4|16|*|+|,PM_VSU_1FLOP,PM_VSU_2FLOP,PM_VSU_4FLOP,PM_VSU_8FLOP,PM_VSU0_16FLOP\n"
1499 "#\n"
1500 "#PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|2|*|+|N2|4|*|+|N3|8|*|+|,PM_VSU_1FLOP,PM_VSU_2FLOP,PM_VSU_4FLOP,PM_VSU_8FLOP\n"
1501 "PRESET,PAPI_FP_OPS,NOT_DERIVED,PM_FLOP\n"
1502 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FLOP\n"
1503 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1504 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1505 "PRESET,PAPI_STL_ICY,DERIVED_POSTFIX,N0|N1|-|,PM_RUN_CYC,PM_1PLUS_PPC_DISP\n"
1506 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_FIN\n"
1507 "PRESET,PAPI_LD_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1508 "PRESET,PAPI_LST_INS,NOT_DERIVED,PM_LSU_FIN\n"
1509 "#PRESET,PAPI_LST_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1,PM_ST_FIN\n"
1510 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BRU_FIN\n"
1511 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PM_BR_MPRED\n"
1512 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED\n"
1513 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1514 "#\n"
1515 "CPU,POWER8\n"
1516 "CPU,power8\n"
1517 "#\n"
1518 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1,PM_ST_MISS_L1\n"
1519 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1\n"
1520 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1521 "PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1\n"
1522 "PRESET,PAPI_L1_DCR,DERIVED_SUB,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1523 "PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|-|N2|+|N3|-,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1524 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1525 "#n/aPRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS\n"
1526 "#n/aPRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS\n"
1527 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1528 "#n/aPRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1529 "#n/aPRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1530 "#n/aPRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1531 "PRESET,PAPI_L1_ICM,NOT_DERIVED,PM_L1_ICACHE_MISS\n"
1532 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1533 "#n/aPRESET,PAPI_L2_ICM,NOT_DERIVED,PM_L2_INST_MISS\n"
1534 "#n/aPRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1535 "#n/aPRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1536 "#n/aPRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1537 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_L3MISS\n"
1538 "#n/aPRESET,PAPI_FMA_INS,NOT_DERIVED,PM_VSU_FMA\n"
1539 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1540 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1541 "#n/aPRESET,PAPI_INT_INS,DERIVED_ADD,PM_FXU0_FIN,PM_FXU1_FIN\n"
1542 "PRESET,PAPI_FP_OPS,NOT_DERIVED,PM_FLOP\n"
1543 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FLOP\n"
1544 "PRESET,PAPI_DP_OPS,DERIVED_POSTFIX,N0|4|*|N1|8|*|N2|16|*|N3|32|*|+|+|+|,PM_VSU0_2FLOP,PM_VSU0_4FLOP,PM_VSU0_8FLOP,PM_VSU0_16FLOP\n"
1545 "PRESET,PAPI_SP_OPS,DERIVED_POSTFIX,N0|4|*|N1|8|*|N2|16|*|N3|32|*|+|+|+|,PM_VSU0_2FLOP,PM_VSU0_4FLOP,PM_VSU0_8FLOP,PM_VSU0_16FLOP\n"
1546 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1547 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1548 "PRESET,PAPI_STL_ICY,DERIVED_POSTFIX,N0|N1|-|,PM_RUN_CYC,PM_1PLUS_PPC_DISP\n"
1549 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_FIN\n"
1550 "#n/aPRESET,PAPI_LD_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1\n"
1551 "#/naPRESET,PAPI_LST_INS,NOT_DERIVED,PM_LSU_FIN\n"
1552 "#PRESET,PAPI_LST_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1,PM_ST_FIN\n"
1553 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_CMPL\n"
1554 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PM_BR_MPRED_CMPL\n"
1555 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED_BR_CMPL\n"
1556 "PRESET,PAPI_BR_TKN,NOT_DERIVED,PM_BR_TAKEN_CMPL\n"
1557 "PRESET,PAPI_BR_UCN,NOT_DERIVED,PM_BR_UNCOND_CMPL\n"
1558 "#n/aPRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1559 "#\n"
1560 "CPU,POWER9\n"
1561 "CPU,power9\n"
1562 "#\n"
1563 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PM_LD_MISS_L1_ALT,PM_ST_MISS_L1\n"
1564 "PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1_ALT\n"
1565 "PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1\n"
1566 "PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1\n"
1567 "PRESET,PAPI_L1_DCR,DERIVED_SUB,PM_LD_REF_L1,PM_LD_MISS_L1_ALT\n"
1568 "#PRESET,PAPI_L1_DCA,DERIVED_POSTFIX,N0|N1|-|N2|+|N3|-,PM_ST_FIN,PM_ST_MISS_L1,PM_LD_REF_L1,PM_LD_MISS_L1_ALT\n"
1569 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_CMPL\n"
1570 "PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1571 "PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS\n"
1572 "PRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS\n"
1573 "PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L2MISS\n"
1574 "PRESET,PAPI_L3_DCM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1575 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PM_DATA_FROM_LMEM,PM_DATA_FROM_RMEM\n"
1576 "PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_L1\n"
1577 "PRESET,PAPI_L1_ICM,NOT_DERIVED,PM_L1_ICACHE_MISS\n"
1578 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1579 "PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_L2_INST_MISS\n"
1580 "PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2\n"
1581 "PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS\n"
1582 "PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3\n"
1583 "PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_L3MISS\n"
1584 "PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FMA_CMPL\n"
1585 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PM_INST_DISP\n"
1586 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL\n"
1587 "PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_FIN\n"
1588 "PRESET,PAPI_FP_OPS,NOT_DERIVED,PM_FLOP_CMPL\n"
1589 "PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FLOP_CMPL\n"
1590 "PRESET,PAPI_DP_OPS,NOT_DERIVED,PM_DP_QP_FLOP_CMPL\n"
1591 "PRESET,PAPI_SP_OPS,NOT_DERIVED,PM_SP_FLOP_CMPL\n"
1592 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC\n"
1593 "PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT\n"
1594 "PRESET,PAPI_STL_ICY,DERIVED_POSTFIX,N0|N1|-|,PM_RUN_CYC,PM_1PLUS_PPC_DISP\n"
1595 "PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_FIN\n"
1596 "PRESET,PAPI_LD_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1_ALT\n"
1597 "PRESET,PAPI_LST_INS,NOT_DERIVED,PM_LSU_FIN\n"
1598 "PRESET,PAPI_LST_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1,PM_ST_FIN\n"
1599 "PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BRU_FIN\n"
1600 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PM_TAKEN_BR_MPRED_CMPL\n"
1601 "PRESET,PAPI_BR_PRC,NOT_DERIVED,PM_BR_PRED\n"
1602 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE\n"
1603 "#\n"
1604 "CPU,ultra12\n"
1605 "#\n"
1606 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLE_CNT\n"
1607 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_CNT\n"
1608 "PRESET,PAPI_L1_ICM,NOT_DERIVED,DISPATCH0_IC_MISS\n"
1609 "PRESET,PAPI_L1_ICA,NOT_DERIVED,IC_REF\n"
1610 "PRESET,PAPI_L1_DCR,NOT_DERIVED,DC_RD\n"
1611 "PRESET,PAPI_L1_DCW,NOT_DERIVED,DC_WR\n"
1612 "PRESET,PAPI_MEM_RCY,NOT_DERIVED,LOAD_USE\n"
1613 "PRESET,PAPI_L2_TCA,NOT_DERIVED,EC_REF\n"
1614 "PRESET,PAPI_BR_MSP,NOT_DERIVED,DISPATCH0_MISPRED\n"
1615 "PRESET,PAPI_L1_ICH,NOT_DERIVED,IC_HIT\n"
1616 "PRESET,PAPI_L2_TCH,NOT_DERIVED,EC_HIT\n"
1617 "PRESET,PAPI_L2_TCM,DERIVED_SUB,EC_REF,EC_HIT\n"
1618 "#\n"
1619 "CPU,ultra3\n"
1620 "CPU,ultra3i\n"
1621 "CPU,ultra3+\n"
1622 "#\n"
1623 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLE_CNT\n"
1624 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_CNT\n"
1625 "PRESET,PAPI_L1_ICM,NOT_DERIVED,DISPATCH0_IC_MISS\n"
1626 "PRESET,PAPI_L1_ICA,NOT_DERIVED,IC_REF\n"
1627 "PRESET,PAPI_L1_DCR,NOT_DERIVED,DC_RD\n"
1628 "PRESET,PAPI_L1_DCW,NOT_DERIVED,DC_WR\n"
1629 "PRESET,PAPI_L2_TCA,NOT_DERIVED,EC_REF\n"
1630 "PRESET,PAPI_BR_TKN,NOT_DERIVED,IU_STAT_BR_COUNT_TAKEN\n"
1631 "PRESET,PAPI_BR_NTK,NOT_DERIVED,IU_STAT_BR_COUNT_UNTAKEN\n"
1632 "PRESET,PAPI_BR_MSP,DERIVED_ADD,IU_STAT_BR_MISS_TAKEN,IU_STAT_BR_MISS_UNTAKEN\n"
1633 "PRESET,PAPI_BR_INS,DERIVED_ADD,IU_STAT_BR_COUNT_TAKEN,IU_STAT_BR_COUNT_UNTAKEN\n"
1634 "PRESET,PAPI_L2_TCM,NOT_DERIVED,EC_MISSES\n"
1635 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1636 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
1637 "#\n"
1638 "CPU,ultra4+\n"
1639 "#\n"
1640 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLE_CNT\n"
1641 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_CNT\n"
1642 "PRESET,PAPI_L1_ICM,NOT_DERIVED,DISPATCH0_IC_MISS\n"
1643 "PRESET,PAPI_L1_ICA,NOT_DERIVED,IC_REF\n"
1644 "PRESET,PAPI_L1_DCR,NOT_DERIVED,DC_RD\n"
1645 "PRESET,PAPI_L1_DCW,NOT_DERIVED,DC_WR\n"
1646 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_REF\n"
1647 "PRESET,PAPI_BR_TKN,NOT_DERIVED,IU_STAT_BR_COUNT_TAKEN\n"
1648 "PRESET,PAPI_BR_NTK,NOT_DERIVED,IU_STAT_BR_COUNT_UNTAKEN\n"
1649 "PRESET,PAPI_BR_MSP,DERIVED_ADD,IU_STAT_BR_MISS_TAKEN,IU_STAT_BR_MISS_UNTAKEN\n"
1650 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1651 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
1652 "PRESET,PAPI_L3_TCM,NOT_DERIVED,L3_MISS\n"
1653 "#\n"
1654 "CPU,niagara\n"
1655 "#\n"
1656 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_CNT\n"
1657 "PRESET,PAPI_FP_INS,NOT_DERIVED,FP_INSTR_CNT\n"
1658 "PRESET,PAPI_L1_ICM,NOT_DERIVED,IC_MISS\n"
1659 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DC_MISS\n"
1660 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1661 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
1662 "#\n"
1663 "CPU,niagara2\n"
1664 "#\n"
1665 "CPU,Cell\n"
1666 "#\n"
1667 "PRESET,PAPI_TOT_INS,DERIVED_POSTFIX,N0|N1|+|2|*|,PPC_INST_COMMIT_TH0,PPC_INST_COMMIT_TH1\n"
1668 "#PRESET,PAPI_L1_DCM,DERIVED_ADD,L1_DCACHE_MISS_TH0,L1_DCACHE_MISS_TH1 where's TH1??\n"
1669 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1_DCACHE_MISS_TH0\n"
1670 "PRESET,PAPI_L2_TCH,NOT_DERIVED,L2_CACHE_HIT\n"
1671 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS\n"
1672 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2_LD_MISS\n"
1673 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2_ST_MISS\n"
1674 "PRESET,PAPI_BR_MSP,DERIVED_ADD,BRANCH_FLUSH_TH0,BRANCH_FLUSH_TH1\n"
1675 "PRESET,PAPI_BR_INS,DERIVED_ADD,BRANCH_COMMIT_TH0,BRANCH_COMMIT_TH1\n"
1676 "#\n"
1677 "CPU,arm_1176\n"
1678 "#\n"
1679 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE_MISS\n"
1680 "PRESET,PAPI_STL_ICY,NOT_DERIVED,IBUF_STALL\n"
1681 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1682 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_MISS\n"
1683 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_EXEC\n"
1684 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BR_MISPREDICT\n"
1685 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_EXEC\n"
1686 "PRESET,PAPI_L1_DCH,NOT_DERIVED,DCACHE_HIT\n"
1687 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DCACHE_ACCESS\n"
1688 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DCACHE_MISS\n"
1689 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1690 "#\n"
1691 "CPU,arm_ac7\n"
1692 "#\n"
1693 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1694 "PRESET,PAPI_LD_INS,NOT_DERIVED,DATA_READS\n"
1695 "PRESET,PAPI_SR_INS,NOT_DERIVED,DATA_WRITES\n"
1696 "PRESET,PAPI_HW_INT,NOT_DERIVED,EXCEPTION_TAKEN\n"
1697 "PRESET,PAPI_BR_INS,NOT_DERIVED,SW_CHANGE_PC\n"
1698 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BRANCH_MISPRED\n"
1699 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1700 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_MEM_ACCESS\n"
1701 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I_CACHE_ACCESS\n"
1702 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L2D_CACHE_ACCESS\n"
1703 "PRESET,PAPI_L2_TCM,NOT_DERIVED,EXTERNAL_MEMORY_REQUEST\n"
1704 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_CACHE_REFILL\n"
1705 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1I_TLB_REFILL\n"
1706 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_CACHE_REFILL\n"
1707 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1D_TLB_REFILL\n"
1708 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2D_CACHE_REFILL\n"
1709 "#\n"
1710 "CPU,arm_ac8\n"
1711 "#\n"
1712 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_EXECUTED\n"
1713 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1714 "PRESET,PAPI_BR_INS,NOT_DERIVED,PC_WRITE\n"
1715 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PC_BRANCH_MIS_PRED\n"
1716 "PRESET,PAPI_LD_INS,NOT_DERIVED,DREAD\n"
1717 "PRESET,PAPI_SR_INS,NOT_DERIVED,DWRITE\n"
1718 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1719 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_REFILL\n"
1720 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DCACHE_ACCESS\n"
1721 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DCACHE_REFILL\n"
1722 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1_INST\n"
1723 "PRESET,PAPI_L1_ICM,NOT_DERIVED,IFETCH_MISS\n"
1724 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_ACCESS\n"
1725 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS\n"
1726 "PRESET,PAPI_BR_TKN,NOT_DERIVED,PC_BRANCH_EXECUTED\n"
1727 "PRESET,PAPI_STL_ICY,NOT_DERIVED,CYCLES_INST_STALL\n"
1728 "#\n"
1729 "CPU,arm_ac9\n"
1730 "#\n"
1731 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_OUT_OF_RENAME_STAGE\n"
1732 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,MAIN_UNIT_EXECUTED_INST\n"
1733 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1734 "PRESET,PAPI_HW_INT,NOT_DERIVED,EXT_INTERRUPTS\n"
1735 "PRESET,PAPI_FP_INS,NOT_DERIVED,FP_EXECUTED_INST\n"
1736 "PRESET,PAPI_VEC_INS,NOT_DERIVED,NEON_EXECUTED_INST\n"
1737 "PRESET,PAPI_BR_INS,NOT_DERIVED,PC_WRITE\n"
1738 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PC_BRANCH_MIS_PRED\n"
1739 "PRESET,PAPI_LD_INS,NOT_DERIVED,DREAD\n"
1740 "PRESET,PAPI_SR_INS,NOT_DERIVED,DWRITE\n"
1741 "PRESET,PAPI_TLB_IM,NOT_DERIVED,ITLB_MISS\n"
1742 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DTLB_REFILL\n"
1743 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DCACHE_ACCESS\n"
1744 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DCACHE_REFILL\n"
1745 "PRESET,PAPI_L1_ICM,NOT_DERIVED,IFETCH_MISS\n"
1746 "#\n"
1747 "CPU,arm_ac15\n"
1748 "CPU,arm_ac57\n"
1749 "#\n"
1750 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1751 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,INST_SPEC_EXEC\n"
1752 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1753 "PRESET,PAPI_FP_INS,NOT_DERIVED,INST_SPEC_EXEC_VFP\n"
1754 "PRESET,PAPI_VEC_INS,NOT_DERIVED,INST_SPEC_EXEC_SIMD\n"
1755 "PRESET,PAPI_BR_INS,NOT_DERIVED,INST_SPEC_EXEC_SOFT_PC\n"
1756 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BRANCH_MISPRED\n"
1757 "PRESET,PAPI_LD_INS,NOT_DERIVED,DATA_MEM_READ_ACCESS\n"
1758 "PRESET,PAPI_SR_INS,NOT_DERIVED,DATA_MEM_WRITE_ACCESS\n"
1759 "PRESET,PAPI_L1_DCA,DERIVED_ADD,L1D_READ_ACCESS,L1D_WRITE_ACCESS\n"
1760 "PRESET,PAPI_L1_DCM,DERIVED_ADD,L1D_READ_REFILL,L1D_WRITE_REFILL\n"
1761 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_READ_ACCESS\n"
1762 "PRESET,PAPI_L1_DCW,NOT_DERIVED,L1D_WRITE_ACCESS\n"
1763 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I_CACHE_ACCESS\n"
1764 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_CACHE_REFILL\n"
1765 "PRESET,PAPI_L2_DCH,NOT_DERIVED,L2D_CACHE_ACCESS\n"
1766 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2D_CACHE_REFILL\n"
1767 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2D_READ_ACCESS\n"
1768 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2D_WRITE_ACCESS\n"
1769 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2D_READ_REFILL\n"
1770 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2D_WRITE_REFILL\n"
1771 "#####################\n"
1772 "# ARM Cortex A53 #\n"
1773 "#####################\n"
1774 "# These are based entirely on libpfm4 event table\n"
1775 "# They have not been tested on real hardware\n"
1776 "CPU,arm_ac53\n"
1777 "#\n"
1778 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1779 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1780 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCH_PRED\n"
1781 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BRANCH_MISPRED\n"
1782 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_CACHE_ACCESS\n"
1783 "PRESET,PAPI_L1_DCM,DERIVED_ADD,L1D_CACHE_REFILL\n"
1784 "PRESET,PAPI_LD_INS,NOT_DERIVED,LD_RETIRED\n"
1785 "PRESET,PAPI_SR_INS,NOT_DERIVED,ST_RETIRED\n"
1786 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_CACHE_REFILL\n"
1787 "PRESET,PAPI_L2_DCA,NOT_DERIVED,L2D_CACHE_ACCESS\n"
1788 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2D_CACHE_REFILL\n"
1789 "PRESET,PAPI_TLB_IM,NOT_DERIVED,L1I_TLB_REFILL\n"
1790 "PRESET,PAPI_TLB_DM,NOT_DERIVED,L1D_TLB_REFILL\n"
1791 "PRESET,PAPI_HW_INT,NOT_DERIVED,EXCEPTION_TAKEN\n"
1792 "#\n"
1793 "CPU,qcom_krait\n"
1794 "#\n"
1795 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_EXECUTED\n"
1796 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,INSTR_EXECUTED\n"
1797 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1798 "PRESET,PAPI_BR_INS,NOT_DERIVED,PC_WRITE\n"
1799 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PC_BRANCH_MIS_PRED\n"
1800 "PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_CACHE_ACCESS\n"
1801 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_CACHE_REFILL\n"
1802 "# Will be supported eventually\n"
1803 "#PRESET,PAPI_L1_ICA,NOT_DERIVED,KRAIT_L1_ICACHE_ACCESS\n"
1804 "#PRESET,PAPI_L1_ICM,NOT_DERIVED,KRAIT_L1_ICACHE_MISS\n"
1805 "#\n"
1806 "CPU,arm_xgene\n"
1807 "#\n"
1808 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1809 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1810 "PRESET,PAPI_FP_INS,NOT_DERIVED,INST_SPEC_EXEC_VFP\n"
1811 "PRESET,PAPI_VEC_INS,NOT_DERIVED,INST_SPEC_EXEC_SIMD\n"
1812 "PRESET,PAPI_BR_INS,NOT_DERIVED,INST_SPEC_EXEC_SOFT_PC\n"
1813 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BRANCH_MISPRED\n"
1814 "PRESET,PAPI_LD_INS,NOT_DERIVED,DATA_MEM_READ_ACCESS\n"
1815 "PRESET,PAPI_SR_INS,NOT_DERIVED,DATA_MEM_WRITE_ACCESS\n"
1816 "PRESET,PAPI_L1_DCA,DERIVED_ADD,L1D_READ_ACCESS,L1D_WRITE_ACCESS\n"
1817 "PRESET,PAPI_L1_DCM,DERIVED_ADD,L1D_CACHE_REFILL\n"
1818 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_READ_ACCESS\n"
1819 "PRESET,PAPI_L1_DCW,NOT_DERIVED,L1D_WRITE_ACCESS\n"
1820 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I_CACHE_ACCESS\n"
1821 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_CACHE_REFILL\n"
1822 "PRESET,PAPI_L2_DCH,NOT_DERIVED,L2D_CACHE_ACCESS\n"
1823 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2D_CACHE_REFILL\n"
1824 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2D_READ_ACCESS\n"
1825 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2D_WRITE_ACCESS\n"
1826 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2D_READ_REFILL\n"
1827 "PRESET,PAPI_L2_STM,NOT_DERIVED,L2D_WRITE_REFILL\n"
1828 "#####################\n"
1829 "# ARM ThunderX2 #\n"
1830 "#####################\n"
1831 "CPU,arm_thunderx2\n"
1832 "#\n"
1833 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_RETIRED\n"
1834 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1835 "PRESET,PAPI_FP_INS,NOT_DERIVED,VFP_SPEC\n"
1836 "PRESET,PAPI_VEC_INS,NOT_DERIVED,ASE_SPEC\n"
1837 "PRESET,PAPI_BR_INS,NOT_DERIVED,BR_RETIRED\n"
1838 "PRESET,PAPI_LD_INS,NOT_DERIVED,LD_RETIRED\n"
1839 "PRESET,PAPI_SR_INS,NOT_DERIVED,ST_RETIRED\n"
1840 "PRESET,PAPI_L1_DCA,DERIVED_ADD,L1D_CACHE_RD,L1D_CACHE_WR\n"
1841 "PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D_CACHE_REFILL\n"
1842 "PRESET,PAPI_L1_DCR,NOT_DERIVED,L1D_CACHE_RD\n"
1843 "PRESET,PAPI_L1_DCW,NOT_DERIVED,L1D_CACHE_WR\n"
1844 "PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I_CACHE\n"
1845 "PRESET,PAPI_L1_ICM,NOT_DERIVED,L1I_CACHE_REFILL\n"
1846 "PRESET,PAPI_L2_DCH,NOT_DERIVED,L2D_CACHE\n"
1847 "PRESET,PAPI_L2_DCM,NOT_DERIVED,L2D_CACHE_REFILL\n"
1848 "PRESET,PAPI_L2_DCR,NOT_DERIVED,L2D_CACHE_RD\n"
1849 "PRESET,PAPI_L2_DCW,NOT_DERIVED,L2D_CACHE_WR\n"
1850 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2D_CACHE_REFILL_RD\n"
1851 "#\n"
1852 "CPU,mips_74k\n"
1853 "#\n"
1854 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLES\n"
1855 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS\n"
1856 "PRESET,PAPI_L1_ICA,NOT_DERIVED,ICACHE_ACCESSES\n"
1857 "PRESET,PAPI_L1_ICM,NOT_DERIVED,ICACHE_MISSES\n"
1858 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DCACHE_ACCESSES\n"
1859 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DCACHE_MISSES\n"
1860 "PRESET,PAPI_L1_TCA,DERIVED_ADD,DCACHE_ACCESSES,ICACHE_ACCESSES\n"
1861 "PRESET,PAPI_L1_TCM,DERIVED_ADD,ICACHE_MISSES,DCACHE_MISSES\n"
1862 "PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_CACHE_ACCESSES\n"
1863 "PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISSES\n"
1864 "PRESET,PAPI_FP_INS,NOT_DERIVED,FPU_INSNS\n"
1865 "PRESET,PAPI_INT_INS,NOT_DERIVED,INTEGER_INSNS\n"
1866 "PRESET,PAPI_LD_INS,NOT_DERIVED,LOAD_INSNS\n"
1867 "PRESET,PAPI_SR_INS,NOT_DERIVED,STORE_INSNS\n"
1868 "PRESET,PAPI_TLB_IM,NOT_DERIVED,JTLB_INSN_MISSES\n"
1869 "PRESET,PAPI_TLB_DM,NOT_DERIVED,JTLB_DATA_MISSES\n"
1870 "PRESET,PAPI_BR_CN,NOT_DERIVED,COND_BRANCH_INSNS\n"
1871 "PRESET,PAPI_BR_MSP,NOT_DERIVED,MISPREDICTED_BRANCH_INSNS\n"
1872 "PRESET,PAPI_CSR_FAL,NOT_DERIVED,FAILED_SC_INSNS\n"
1873 "PRESET,PAPI_CSR_TOT,NOT_DERIVED,SC_INSNS\n"
1874 "PRESET,PAPI_FUL_ICY,NOT_DERIVED,DUAL_ISSUE_CYCLES\n"
1875 "PRESET,PAPI_STL_CCY,NOT_DERIVED,NO_INSN_CYCLES\n"
1876 "PRESET,PAPI_FUL_CCY,NOT_DERIVED,TWO_INSNS_CYCLES\n"
1877 "#\n"
1878 "CPU,MIPSICE9A\n"
1879 "#\n"
1880 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1881 "PRESET,PAPI_TOT_INS,NOT_DERIVED,CPU_INSEXEC\n"
1882 "PRESET,PAPI_L1_ICA,NOT_DERIVED,CPU_INSFETCH\n"
1883 "PRESET,PAPI_LD_INS,NOT_DERIVED,CPU_LOAD\n"
1884 "PRESET,PAPI_SR_INS,NOT_DERIVED,CPU_STORE\n"
1885 "PRESET,PAPI_CSR_FAL,NOT_DERIVED,CPU_SCFAIL\n"
1886 "PRESET,PAPI_CSR_TOT,NOT_DERIVED,CPU_SC\n"
1887 "PRESET,PAPI_FP_INS,NOT_DERIVED,CPU_FLOAT\n"
1888 "PRESET,PAPI_BR_INS,NOT_DERIVED,CPU_BRANCH\n"
1889 "PRESET,PAPI_TLB_IM,NOT_DERIVED,CPU_ITLBMISS\n"
1890 "PRESET,PAPI_TLB_TL,NOT_DERIVED,CPU_TLBTRAP\n"
1891 "PRESET,PAPI_TLB_DM,NOT_DERIVED,CPU_DTLBMISS\n"
1892 "PRESET,PAPI_BR_MSP,NOT_DERIVED,CPU_MISPRED\n"
1893 "PRESET,PAPI_L1_ICM,NOT_DERIVED,CPU_ICMISS\n"
1894 "PRESET,PAPI_L1_DCM,NOT_DERIVED,CPU_DCMISS\n"
1895 "PRESET,PAPI_MEM_SCY,NOT_DERIVED,CPU_MSTALL\n"
1896 "PRESET,PAPI_FUL_ICY,NOT_DERIVED,CPU_INSDUAL\n"
1897 "#\n"
1898 "CPU,MIPSICE9B\n"
1899 "#\n"
1900 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES\n"
1901 "PRESET,PAPI_TOT_INS,NOT_DERIVED,CPU_INSEXEC\n"
1902 "PRESET,PAPI_L1_ICA,NOT_DERIVED,CPU_INSFETCH\n"
1903 "PRESET,PAPI_LD_INS,NOT_DERIVED,CPU_LOAD\n"
1904 "PRESET,PAPI_SR_INS,NOT_DERIVED,CPU_STORE\n"
1905 "PRESET,PAPI_CSR_FAL,NOT_DERIVED,CPU_SCFAIL\n"
1906 "PRESET,PAPI_CSR_TOT,NOT_DERIVED,CPU_SC\n"
1907 "PRESET,PAPI_FP_INS,NOT_DERIVED,CPU_FPARITH\n"
1908 "PRESET,PAPI_BR_INS,NOT_DERIVED,CPU_BRANCH\n"
1909 "PRESET,PAPI_TLB_IM,NOT_DERIVED,CPU_ITLBMISS\n"
1910 "PRESET,PAPI_TLB_TL,NOT_DERIVED,CPU_TLBTRAP\n"
1911 "PRESET,PAPI_TLB_DM,NOT_DERIVED,CPU_DTLBMISS\n"
1912 "PRESET,PAPI_BR_MSP,NOT_DERIVED,CPU_MISPRED\n"
1913 "PRESET,PAPI_L1_ICM,NOT_DERIVED,CPU_ICMISS\n"
1914 "PRESET,PAPI_L1_DCM,NOT_DERIVED,CPU_DCMISS\n"
1915 "PRESET,PAPI_MEM_SCY,NOT_DERIVED,CPU_MSTALL\n"
1916 "PRESET,PAPI_FUL_ICY,NOT_DERIVED,CPU_INSDUAL\n"
1917 "PRESET,PAPI_L2_TCM,NOT_DERIVED,CPU_L2MISSALL\n"
1918 "PRESET,PAPI_L2_TCA,NOT_DERIVED,CPU_L2REQ\n"
1919 "#\n"
1920 "CPU,BGQ\n"
1921 "#\n"
1922 "# Conditional Branching\n"
1923 "PRESET,PAPI_BR_CN,NOT_DERIVED,PEVT_INST_XU_BRC\n"
1924 "PRESET,PAPI_BR_INS,NOT_DERIVED,PEVT_XU_BR_COMMIT\n"
1925 "PRESET,PAPI_BR_MSP,NOT_DERIVED,PEVT_XU_BR_MISPRED_COMMIT\n"
1926 "PRESET,PAPI_BR_NTK,DERIVED_POSTFIX,N0|N1|-|N2|-|,PEVT_INST_XU_BRC,PEVT_XU_BR_TAKEN_COMMIT,PEVT_INST_XU_BRU\n"
1927 "#PRESET,PAPI_BR_NTK,DERIVED_SUB,PEVT_INST_XU_BRC,PEVT_XU_BR_TAKEN_COMMIT # Not sure if branches_taken includes unconditional branches as well\n"
1928 "PRESET,PAPI_BR_PRC,DERIVED_SUB,PEVT_INST_XU_BRC,PEVT_XU_BR_MISPRED_COMMIT\n"
1929 "PRESET,PAPI_BR_TKN,DERIVED_SUB,PEVT_XU_BR_TAKEN_COMMIT,PEVT_INST_XU_BRU\n"
1930 "#PRESET,PAPI_BR_TKN,NOT_DERIVED,PEVT_XU_BR_TAKEN_COMMIT # Not sure if branches_taken includes unconditional branches as well\n"
1931 "PRESET,PAPI_BR_UCN,NOT_DERIVED,PEVT_INST_XU_BRU\n"
1932 "PRESET,PAPI_BTAC_M,NOT_DERIVED,PEVT_XU_BR_TARG_ADDR_MISPRED_COMMIT\n"
1933 "#\n"
1934 "# Cache Requests\n"
1935 "# none so far\n"
1936 "#\n"
1937 "# Conditional Store\n"
1938 "PRESET,PAPI_CSR_FAL,NOT_DERIVED,PEVT_XU_STCX_FAIL\n"
1939 "PRESET,PAPI_CSR_SUC,DERIVED_SUB,PEVT_LSU_COMMIT_STCX,PEVT_XU_STCX_FAIL\n"
1940 "PRESET,PAPI_CSR_TOT,NOT_DERIVED,PEVT_LSU_COMMIT_STCX\n"
1941 "#\n"
1942 "# Floating Point Operations\n"
1943 "PRESET,PAPI_FAD_INS,DERIVED_ADD,PEVT_INST_QFPU_FADD,PEVT_INST_QFPU_QADD\n"
1944 "PRESET,PAPI_FDV_INS,NOT_DERIVED,PEVT_INST_QFPU_FDIV\n"
1945 "PRESET,PAPI_FMA_INS,DERIVED_ADD,PEVT_INST_QFPU_FMA,PEVT_INST_QFPU_QMA\n"
1946 "PRESET,PAPI_FML_INS,DERIVED_ADD,PEVT_INST_QFPU_FMUL,PEVT_INST_QFPU_QMUL\n"
1947 "PRESET,PAPI_FP_INS,NOT_DERIVED,PEVT_INST_QFPU_ALL\n"
1948 "# TODO: for PAPI_FP_OPS it's either FPGRP1 or FPGRP2. Needs to be tested\n"
1949 "PRESET,PAPI_FP_OPS,NOT_DERIVED,PEVT_INST_QFPU_FPGRP1\n"
1950 "# PRESET,PAPI_FP_OPS,NOT_DERIVED,PEVT_INST_QFPU_FPGRP2\n"
1951 "PRESET,PAPI_FP_STAL,NOT_DERIVED,PEVT_IU_AXU_FXU_DEP_HIT_CYC\n"
1952 "PRESET,PAPI_FSQ_INS,NOT_DERIVED,PEVT_INST_QFPU_FSQ\n"
1953 "#\n"
1954 "# Instruction Counting\n"
1955 "#PRESET,PAPI_FUL_ICY,NOT_DERIVED,PEVT_IU_TWO_INSTR_ISSUE\n"
1956 "PRESET,PAPI_FXU_IDL,NOT_DERIVED,PEVT_AXU_IDLE\n"
1957 "PRESET,PAPI_HW_INT,NOT_DERIVED,PEVT_XU_INTS_TAKEN\n"
1958 "PRESET,PAPI_INT_INS,NOT_DERIVED,PEVT_INST_XU_GRP_MASK:837800,NOTE,'UPC_P_XU_OGRP_IADD|UPC_P_XU_OGRP_IMUL|UPC_P_XU_OGRP_IDIV|UPC_P_XU_OGRP_ICMP|UPC_P_XU_OGRP_IMOV|UPC_P_XU_OGRP_ILOG|UPC_P_XU_OGRP_BITS'\n"
1959 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PEVT_CYCLES\n"
1960 "PRESET,PAPI_TOT_IIS,NOT_DERIVED,PEVT_IU_TOT_ISSUE_COUNT\n"
1961 "PRESET,PAPI_TOT_INS,NOT_DERIVED,PEVT_INST_ALL\n"
1962 "PRESET,PAPI_VEC_INS,DERIVED_ADD,PEVT_INST_QFPU_GRP_MASK:3FE,PEVT_INST_XU_GRP_MASK:3000000,NOTE,'UPC_P_AXU_OGRP_QADD|UPC_P_AXU_OGRP_QCMP|UPC_P_AXU_OGRP_QCVT|UPC_P_AXU_OGRP_QMA|UPC_P_AXU_OGRP_QMOV|UPC_P_AXU_OGRP_QMUL|UPC_P_AXU_OGRP_QOTH|UPC_P_AXU_OGRP_QRES|UPC_P_AXU_OGRP_QRND + UPC_P_XU_OGRP_QLD|UPC_P_XU_OGRP_QST'\n"
1963 "#\n"
1964 "# Cache Access\n"
1965 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PEVT_LSU_COMMIT_LD_MISSES,PEVT_LSU_COMMIT_ST_MISSES\n"
1966 "PRESET,PAPI_L1_DCR,NOT_DERIVED,PEVT_LSU_COMMIT_CACHEABLE_LDS\n"
1967 "PRESET,PAPI_L1_DCW,NOT_DERIVED,PEVT_LSU_COMMIT_STS\n"
1968 "PRESET,PAPI_L1_ICM,NOT_DERIVED,PEVT_IU_IL1_MISS\n"
1969 "PRESET,PAPI_L1_ICR,NOT_DERIVED,PEVT_IU_ICACHE_FETCH\n"
1970 "PRESET,PAPI_L1_LDM,DERIVED_ADD,PEVT_IU_IL1_MISS,PEVT_LSU_COMMIT_LD_MISSES\n"
1971 "PRESET,PAPI_L1_STM,NOT_DERIVED,PEVT_LSU_COMMIT_ST_MISSES\n"
1972 "#PRESET,PAPI_L2_TCH,NOT_DERIVED,PEVT_L2_HITS\n"
1973 "#PRESET,PAPI_L2_TCM,NOT_DERIVED,PEVT_L2_MISSES\n"
1974 "#\n"
1975 "# Data Access\n"
1976 "PRESET,PAPI_LD_INS,DERIVED_ADD,PEVT_LSU_COMMIT_CACHEABLE_LDS,PEVT_LSU_COMMIT_CACHE_INHIB_LD_MISSES\n"
1977 "# may not be possible\n"
1978 "#PRESET,PAPI_LST_INS,DERIVED_POSTFIX,N0|N1|+|N2|+|,PEVT_LSU_COMMIT_CACHEABLE_LDS,PEVT_LSU_COMMIT_CACHE_INHIB_LD_MISSES,PEVT_LSU_COMMIT_STS\n"
1979 "#PRESET,PAPI_MEM_RCY,NOT_DERIVED,PEVT_IU_RAW_DEP_HIT_CYC\n"
1980 "#PRESET,PAPI_PRF_DM,NOT_DERIVED,PEVT_LSU_COMMIT_DCBT_MISSES\n"
1981 "PRESET,PAPI_RES_STL,NOT_DERIVED,PEVT_IU_IS1_STALL_CYC\n"
1982 "PRESET,PAPI_SR_INS,NOT_DERIVED,PEVT_LSU_COMMIT_STS\n"
1983 "PRESET,PAPI_STL_CCY,DERIVED_SUB,PEVT_CYCLES,PEVT_INST_ALL\n"
1984 "PRESET,PAPI_STL_ICY,DERIVED_SUB,PEVT_CYCLES,PEVT_IU_TOT_ISSUE_COUNT\n"
1985 "PRESET,PAPI_SYC_INS,NOT_DERIVED,PEVT_INST_XU_SYNC\n"
1986 "#\n"
1987 "# TLB Operations\n"
1988 "PRESET,PAPI_TLB_DM,DERIVED_ADD,PEVT_MMU_TLB_MISS_DIRECT_DERAT,PEVT_MMU_TLB_MISS_INDIR_DERAT\n"
1989 "PRESET,PAPI_TLB_IM,NOT_DERIVED,PEVT_MMU_TLB_MISS_DIRECT_DERAT\n"
1990 "PRESET,PAPI_TLB_SD,NOT_DERIVED,PEVT_MMU_TLBIVAX_SNOOP_TOT\n"
1991 "PRESET,PAPI_TLB_TL,DERIVED_POSTFIX,N0|N1|+|N2|+|,PEVT_MMU_TLB_MISS_DIRECT_DERAT,PEVT_MMU_TLB_MISS_INDIR_DERAT,PEVT_MMU_TLB_MISS_DIRECT_IERAT\n"
1992 "#################################\n"
1993 "# Intel MIC / Xeon-Phi / Knights Corner\n"
1994 "CPU,knc\n"
1995 "#\n"
1996 "PRESET,PAPI_BR_INS,NOT_DERIVED,BRANCHES:mg=1:mh=1\n"
1997 "PRESET,PAPI_BR_MSP,NOT_DERIVED,BRANCHES_MISPREDICTED:mg=1:mh=1\n"
1998 "PRESET,PAPI_L1_ICM,NOT_DERIVED,CODE_CACHE_MISS:mg=1:mh=1\n"
1999 "PRESET,PAPI_TLB_IM,NOT_DERIVED,CODE_PAGE_WALK:mg=1:mh=1\n"
2000 "PRESET,PAPI_L1_ICA,NOT_DERIVED,CODE_READ:mg=1:mh=1\n"
2001 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CLK_UNHALTED:mg=1:mh=1\n"
2002 "PRESET,PAPI_TLB_DM,NOT_DERIVED,DATA_PAGE_WALK:mg=1:mh=1\n"
2003 "PRESET,PAPI_LD_INS,NOT_DERIVED,DATA_READ:mg=1:mh=1\n"
2004 "PRESET,PAPI_SR_INS,NOT_DERIVED,DATA_WRITE:mg=1:mh=1\n"
2005 "PRESET,PAPI_L1_DCM,NOT_DERIVED,DATA_READ_MISS_OR_WRITE_MISS:mg=1:mh=1\n"
2006 "PRESET,PAPI_L1_DCA,NOT_DERIVED,DATA_READ_OR_WRITE:mg=1:mh=1\n"
2007 "PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTRUCTIONS_EXECUTED:mg=1:mh=1\n"
2008 "PRESET,PAPI_L2_LDM,NOT_DERIVED,L2_READ_MISS:mg=1:mh=1\n"
2009 "PRESET,PAPI_VEC_INS,NOT_DERIVED,VPU_INSTRUCTIONS_EXECUTED:mg=1:mh=1\n"
2010 "CPU,BGP\n"
2011 "# The following PAPI presets are accurate for all application nodes\n"
2012 "# using SMP processing for zero or one threads. The appropriate native\n"
2013 "# hardware counters mapped to the following PAPI preset counters are\n"
2014 "# only collected for processors 0 and 1 for each physical compute card.\n"
2015 "# The values are correct for other processing mode/thread combinations,\n"
2016 "# but only for those application nodes running on processor 0 or 1 of\n"
2017 "# a given physical compute card.\n"
2018 "PRESET,PAPI_L1_DCM,DERIVED_ADD,PNE_BGP_PU0_DCACHE_MISS,PNE_BGP_PU1_DCACHE_MISS\n"
2019 "PRESET,PAPI_L1_ICM,DERIVED_ADD,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2020 "PRESET,PAPI_L1_TCM,DERIVED_ADD,PNE_BGP_PU0_DCACHE_MISS,PNE_BGP_PU1_DCACHE_MISS,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2021 "PRESET,PAPI_CA_SNP,DERIVED_ADD,PNE_BGP_PU0_L1_INVALIDATION_REQUESTS,PNE_BGP_PU1_L1_INVALIDATION_REQUESTS\n"
2022 "PRESET,PAPI_PRF_DM,DERIVED_ADD,NE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2023 "PRESET,PAPI_FMA_INS,DERIVED_ADD,PNE_BGP_PU0_FPU_FMA_2,PNE_BGP_PU1_FPU_FMA_2,PNE_BGP_PU0_FPU_FMA_4,PNE_BGP_PU1_FPU_FMA_4\n"
2024 "PRESET,PAPI_FP_INS,DERIVED_ADD,PNE_BGP_PU0_FPU_ADD_SUB_1,PNE_BGP_PU1_FPU_ADD_SUB_1,PNE_BGP_PU0_FPU_MULT_1,PNE_BGP_PU1_FPU_MULT_1,PNE_BGP_PU0_FPU_FMA_2,PNE_BGP_PU1_FPU_FMA_2,PNE_BGP_PU0_FPU_DIV_1,PNE_BGP_PU1_FPU_DIV_1,PNE_BGP_PU0_FPU_OTHER_NON_STORAGE_OPS,PNE_BGP_PU1_FPU_OTHER_NON_STORAGE_OPS,PNE_BGP_PU0_FPU_ADD_SUB_2,PNE_BGP_PU1_FPU_ADD_SUB_2,PNE_BGP_PU0_FPU_MULT_2,PNE_BGP_PU1_FPU_MULT_2,PNE_BGP_PU0_FPU_FMA_4,PNE_BGP_PU1_FPU_FMA_4,PNE_BGP_PU0_FPU_DUAL_PIPE_OTHER_NON_STORAGE_OPS,PNE_BGP_PU1_FPU_DUAL_PIPE_OTHER_NON_STORAGE_OPS\n"
2025 "PRESET,PAPI_LD_INS,DERIVED_ADD,PNE_BGP_PU0_DATA_LOADS,PNE_BGP_PU1_DATA_LOADS\n"
2026 "PRESET,PAPI_SR_INS,DERIVED_ADD,PNE_BGP_PU0_DATA_STORES,PNE_BGP_PU1_DATA_STORES\n"
2027 "PRESET,PAPI_LST_INS,DERIVED_ADD,PNE_BGP_PU0_DATA_LOADS,PNE_BGP_PU1_DATA_LOADS,PNE_BGP_PU0_DATA_STORES,PNE_BGP_PU1_DATA_STORES\n"
2028 "PRESET,PAPI_L1_DCH,DERIVED_ADD,PNE_BGP_PU0_DCACHE_HIT,PNE_BGP_PU1_DCACHE_HIT\n"
2029 "PRESET,PAPI_L1_DCA,DERIVED_ADD,PNE_BGP_PU0_DCACHE_HIT,PNE_BGP_PU1_DCACHE_HIT,PNE_BGP_PU0_DCACHE_MISS,PNE_BGP_PU1_DCACHE_MISS\n"
2030 "PRESET,PAPI_L1_DCR,DERIVED_ADD,PNE_BGP_PU0_DATA_LOADS,PNE_BGP_PU1_DATA_LOADS\n"
2031 "PRESET,PAPI_L1_ICH,DERIVED_ADD,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT\n"
2032 "PRESET,PAPI_L1_ICA,DERIVED_ADD,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2033 "PRESET,PAPI_L1_ICR,DERIVED_ADD,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2034 "PRESET,PAPI_L1_ICW,DERIVED_ADD,PNE_BGP_PU0_ICACHE_LINEFILLINPROG,PNE_BGP_PU1_ICACHE_LINEFILLINPROG\n"
2035 "PRESET,PAPI_L1_TCH, DERIVED_ADD,PNE_BGP_PU0_DCACHE_HIT,PNE_BGP_PU1_DCACHE_HIT,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT,\n"
2036 "PRESET,PAPI_L1_TCA,DERIVED_ADD,PNE_BGP_PU0_DCACHE_HIT,PNE_BGP_PU1_DCACHE_HIT,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT,PNE_BGP_PU0_DCACHE_MISS,PNE_BGP_PU1_DCACHE_MISS,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS,PNE_BGP_PU0_DCACHE_LINEFILLINPROG,PNE_BGP_PU1_DCACHE_LINEFILLINPROG\n"
2037 "PRESET,PAPI_L1_TCR,DERIVED_ADD,PNE_BGP_PU0_DCACHE_HIT,PNE_BGP_PU1_DCACHE_HIT,PNE_BGP_PU0_ICACHE_HIT,PNE_BGP_PU1_ICACHE_HIT,PNE_BGP_PU0_DCACHE_MISS,PNE_BGP_PU1_DCACHE_MISS,PNE_BGP_PU0_ICACHE_MISS,PNE_BGP_PU1_ICACHE_MISS\n"
2038 "PRESET,PAPI_L1_TCW,DERIVED_ADD,PNE_BGP_PU0_DCACHE_LINEFILLINPROG,PNE_BGP_PU1_DCACHE_LINEFILLINPROG,PNE_BGP_PU0_ICACHE_LINEFILLINPROG,PNE_BGP_PU1_ICACHE_LINEFILLINPROG\n"
2039 "PRESET,PAPI_FP_OPS,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|+|N4|2|*|+|N5|2|*|+|N6|13|*|+|N7|13|*|+|N8|+|N9|+|N10|2|*|+|N11|2|*|+|N12|2|*|+|N13|2|*|+|N14|4|*|+|N15|4|*|+|N16|2|*|+|N17|2|*|+|,PNE_BGP_PU0_FPU_ADD_SUB_1,PNE_BGP_PU1_FPU_ADD_SUB_1,PNE_BGP_PU0_FPU_MULT_1,PNE_BGP_PU1_FPU_MULT_1,PNE_BGP_PU0_FPU_FMA_2,PNE_BGP_PU1_FPU_FMA_2,PNE_BGP_PU0_FPU_DIV_1,PNE_BGP_PU1_FPU_DIV_1,PNE_BGP_PU0_FPU_OTHER_NON_STORAGE_OPS,PNE_BGP_PU1_FPU_OTHER_NON_STORAGE_OPS,PNE_BGP_PU0_FPU_ADD_SUB_2,PNE_BGP_PU1_FPU_ADD_SUB_2,PNE_BGP_PU0_FPU_MULT_2,PNE_BGP_PU1_FPU_MULT_2,PNE_BGP_PU0_FPU_FMA_4,PNE_BGP_PU1_FPU_FMA_4,PNE_BGP_PU0_FPU_DUAL_PIPE_OTHER_NON_STORAGE_OPS,PNE_BGP_PU1_FPU_DUAL_PIPE_OTHER_NON_STORAGE_OPS\n"
2040 "# The following PAPI presets are accurate for any processing mode of \n"
2041 "# SMP, DUAL, or VN for all application nodes. The appropriate native \n"
2042 "# hardware counters used for the following PAPI preset counters are\n"
2043 "# collected for all four processors for each physical compute card.\n"
2044 "PRESET,PAPI_L2_DCM,DERIVED_POSTFIX,N0|N1|+|N2|+|N3|+|N4|-|N5|-|N6|-|N7|-|,PNE_BGP_PU0_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU1_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU2_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU3_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU0_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU1_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU2_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU3_L2_PREFETCH_HITS_IN_STREAM\n"
2045 "PRESET,PAPI_L3_LDM,DERIVED_ADD,PNE_BGP_L3_M0_RD0_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M0_RD0_DIR1_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_RD0_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_RD0_DIR1_MISS_OR_LOCKDOWN,PNE_BGP_L3_M0_RD1_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M0_RD1_DIR1_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_RD1_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_RD1_DIR1_MISS_OR_LOCKDOWN,PNE_BGP_L3_M0_R2_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M0_R2_DIR1_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_R2_DIR0_MISS_OR_LOCKDOWN,PNE_BGP_L3_M1_R2_DIR1_MISS_OR_LOCKDOWN\n"
2046 "# NOTE: This value is for the time the counters are active,\n"
2047 "# and not for the total cycles for the job.\n"
2048 "PRESET,PAPI_TOT_CYC,NOT_DERIVED,PNE_BGP_MISC_ELAPSED_TIME\n"
2049 "PRESET,PAPI_L2_DCH,DERIVED_ADD,PNE_BGP_PU0_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU1_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU2_L2_PREFETCH_HITS_IN_STREAM,PNE_BGP_PU3_L2_PREFETCH_HITS_IN_STREAM\n"
2050 "PRESET,PAPI_L2_DCA,DERIVED_ADD,PNE_BGP_PU0_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU1_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU2_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU3_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU0_L2_MEMORY_WRITES,PNE_BGP_PU1_L2_MEMORY_WRITES,PNE_BGP_PU2_L2_MEMORY_WRITES,PNE_BGP_PU3_L2_MEMORY_WRITES\n"
2051 "PRESET,PAPI_L2_DCR,DERIVED_ADD,PNE_BGP_PU0_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU1_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU2_L2_PREFETCHABLE_REQUESTS,PNE_BGP_PU3_L2_PREFETCHABLE_REQUESTS\n"
2052 "PRESET,PAPI_L2_DCW,DERIVED_ADD,PNE_BGP_PU0_L2_MEMORY_WRITES,PNE_BGP_PU1_L2_MEMORY_WRITES,PNE_BGP_PU2_L2_MEMORY_WRITES,PNE_BGP_PU3_L2_MEMORY_WRITES\n"
2053 "PRESET,PAPI_L3_TCA,DERIVED_ADD,PNE_BGP_L3_M0_RD0_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_RD1_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_R2_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_RD0_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_RD1_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_R2_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_RD0_BURST_DELIVERED_L2,PNE_BGP_L3_M0_RD1_BURST_DELIVERED_L2,PNE_BGP_L3_M0_R2_BURST_DELIVERED_L2,PNE_BGP_L3_M1_RD0_BURST_DELIVERED_L2,PNE_BGP_L3_M1_RD1_BURST_DELIVERED_L2,PNE_BGP_L3_M1_R2_BURST_DELIVERED_L2,BGP_L3_M0_W0_DEPOSIT_REQUESTS,BGP_L3_M0_W1_DEPOSIT_REQUESTS,BGP_L3_M1_W0_DEPOSIT_REQUESTS,BGP_L3_M1_W1_DEPOSIT_REQUESTS\n"
2054 "PRESET,PAPI_L3_TCR,DERIVED_ADD,PNE_BGP_L3_M0_RD0_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_RD1_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_R2_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_RD0_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_RD1_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M1_R2_SINGLE_LINE_DELIVERED_L2,PNE_BGP_L3_M0_RD0_BURST_DELIVERED_L2,PNE_BGP_L3_M0_RD1_BURST_DELIVERED_L2,PNE_BGP_L3_M0_R2_BURST_DELIVERED_L2,PNE_BGP_L3_M1_RD0_BURST_DELIVERED_L2,PNE_BGP_L3_M1_RD1_BURST_DELIVERED_L2,PNE_BGP_L3_M1_R2_BURST_DELIVERED_L2\n"
2055 "PRESET,PAPI_L3_TCW,DERIVED_ADD,PNE_BGP_L3_M0_W0_DEPOSIT_REQUESTS,PNE_BGP_L3_M0_W1_DEPOSIT_REQUESTS,PNE_BGP_L3_M1_W0_DEPOSIT_REQUESTS,PNE_BGP_L3_M1_W1_DEPOSIT_REQUESTS\n"
2056 ;
papi_events_table
static char * papi_events_table
Definition: papi_events_table.h:1