1#ifndef M4RI_M4RI_CONFIG_H
2#define M4RI_M4RI_CONFIG_H
5#define __M4RI_HAVE_MM_MALLOC 1
6#define __M4RI_HAVE_POSIX_MEMALIGN 1
7#define __M4RI_HAVE_SSE2 1
8#if 1 && defined(__SSE2__) && __SSE2__
10#define __M4RI_HAVE_SSE2 1
12#define __M4RI_HAVE_OPENMP 0
13#define __M4RI_CPU_L1_CACHE 32768
14#define __M4RI_CPU_L2_CACHE 524288
15#define __M4RI_CPU_L3_CACHE 268435456
16#define __M4RI_DEBUG_DUMP (0 || 0)
17#define __M4RI_DEBUG_MZD 0
18#define __M4RI_HAVE_LIBPNG 1
20#define __M4RI_CC "x86_64-alt-linux-gcc"
21#define __M4RI_CFLAGS " -pipe -frecord-gcc-switches -Wall -g -O2 -flto=auto -ffat-lto-objects"
22#define __M4RI_OPENMP_CFLAGS ""
25#define __M4RI_USE_MM_MALLOC (__M4RI_HAVE_MM_MALLOC && __M4RI_HAVE_SSE2)
26#define __M4RI_USE_POSIX_MEMALIGN (__M4RI_HAVE_POSIX_MEMALIGN && __M4RI_HAVE_SSE2)
27#define __M4RI_DD_QUIET (0 && !0)
29#define __M4RI_ENABLE_MZD_CACHE 1
30#define __M4RI_ENABLE_MMC 1
32#if defined(__MINGW32__) || defined(__MINGW64__)